@@ -1,22 +0,0 @@
-use strict;
-use warnings;
-
-use lib 'inc';
-
-use Module::Build;
-use MyBuilder;
-
-my $builder = MyBuilder->new(
- module_name => 'Acme::6502',
- license => 'perl',
- dist_author => 'Andy Armstrong <andy@hexten.net>',
- dist_version_from => 'lib/Acme/6502.pm',
- requires => {
- 'Test::More' => 0,
- 'version' => 0,
- 'Term::ReadKey' => 0,
- },
- add_to_cleanup => ['Acme-6502-*'],
-);
-
-$builder->create_build_script();
@@ -0,0 +1,55 @@
+Contributing
+============
+
+The "Acme" Project needs your help!
+
+Please consider being a contributor. This file contains instructions that will
+help you be an effective contributor to the Project.
+
+GitHub
+------
+
+The code for this Project is hosted at GitHub. The repository is:
+
+ https://github.com/ingydotnet/acme-pm
+
+You can get the code with this command:
+
+ git clone https://github.com/ingydotnet/acme-pm
+
+If you've found a bug or a missing feature that you would like the author to
+know about, report it here:
+
+ https://github.com/ingydotnet/acme-pm/issues
+
+or fix it and submit a pull request here:
+
+ https://github.com/ingydotnet/acme-pm/pulls
+
+See these links for help on interacting with GitHub:
+
+* https://help.github.com/
+* https://help.github.com/articles/creating-a-pull-request
+
+Zilla::Dist
+-----------
+
+This Project uses Zilla::Dist to prepare it for publishing to CPAN. Read:
+
+ https://metacpan.org/pod/distribution/Zilla-Dist/lib/Zilla/Dist/Contributing.pod
+
+for up-to-date instructions on what contributors like yourself need to know to
+use it.
+
+IRC
+---
+
+Acme has an IRC channel where you can find real people to help you:
+
+ irc.freenode.net#pkg
+
+Join the channel. Join the team!
+
+
+ Thanks in advance, Ingy döt Net
+
@@ -1,60 +1,42 @@
-Revision history for Acme-6502
+1.11111111111 Sat Aug 16 10:03:08 PDT 2014
+ - Perfected Acme
+ - Added test
+ - Meta 0.0.2
-0.77 2012-08-28
- - Fixed 0x76 to be proper "ROR zp, x" instruction
- - Fixed some instruction label comments
- - Fixed RTI instruction
- - Fixed 0x61 to be proper "ADC (zp, x)" instruction
+1.1111111111 Fri Aug 15 19:15:18 PDT 2014
+ - Perfected Acme
+ - Added t/000-compile-modules.t
+ - Support ever growing VERSION
-0.76 2011-03-08
- - Remove Class::Std dependency
+1.111111111 Sun Aug 3 21:10:23 PDT 2014
+ - Perfected Acme
+ - Fixed Meta and added Contributing file.
-0.75 2009-05-29
- - Remove Makefile.PL
- - Move to GitHub
+1.11111111 Wed Jul 2 16:06:33 PDT 2014
+ - Perfected Acme
+ - Split 'package UNIVERSAL' for pause. ether++
-0.74 2008-12-10
- - Fix indirect JMP bug emulation so it only applies to indirect JMPs
+1.1111111 Wed Jul 2 14:39:48 PDT 2014
+ - Perfected Acme
+ - Zilla::Dist (A-Z!)
-0.73 2008-09-24
- - Oops. Added NES tests to MANIFEST
+1.111111 Fri Jan 21 00:33:52 EST 2011
+ - Perfected Acme once more
+ - https://rt.cpan.org/Ticket/Display.html?id=61851
-0.72 2008-09-24
- - Added a test suite pulled from the monkeynes project
- * patched script_7C.txt to work properly
- * patched script_94.txt to test proper mem location
- * patched script_95.txt to test proper mem location
- * patched script_96.txt to test proper mem location
- * patched all branching tests to do proper negative branches
- * patched script_40.txt and script_00.txt with proper diag info and proper
- PC storage on BRK
- - Fix PLP to clear B flag instead of setting it
- - Fix TSX to set N and Z flag based on the value of X
- - Emulate a page boundary bug in JMP instructions
- - Fix BRK to set B flag
+1.11111 Wed Jan 18 15:04:45 PST 2006
+ - Perfected Acme
-0.71 2007-11-08
- - A new dawn in the struggle to free ourselves from the shackles of version
- number oppression.
+1.1111 Sat Mar 26 22:40:47 PST 2005
+ - Perfected Acme
-0.70 2007-11-07
- - An end to version number madness. I hope.
+1.111 Wed Mar 24 05:05:26 PST 2004
+ - Acme is teh_shiznit
+ - Export Spiffy acme()
-0.0.6 2007-02-23
- - Added machine readable license.
+1.11 Sun Mar 21 04:04:25 PST 2004
+ - Acme Becomes One With The UNIVERSAL.
-0.0.5 2006-12-19
- - Replaced hardwired tracing with signals thrown before / after OS calls
-
-0.0.4 2006-12-19
- - Fixed module name in POD for Acme::6502::Tube
-
-0.0.3 2006-12-18
- - Added kludgy OSRDCH support. Forth sort of works now.
- - Added OSCALL tracing to Tube.pm
-
-0.0.2 2006-12-18
- - Added Class::Std to prereqs
-
-0.0.1 2006-12-18
+1.00 Sun Mar 21 02:36:07 PST 2004
- Initial release.
+
@@ -0,0 +1,379 @@
+This software is copyright (c) 2014 by Ingy döt Net.
+
+This is free software; you can redistribute it and/or modify it under
+the same terms as the Perl 5 programming language system itself.
+
+Terms of the Perl programming language system itself
+
+a) the GNU General Public License as published by the Free
+ Software Foundation; either version 1, or (at your option) any
+ later version, or
+b) the "Artistic License"
+
+--- The GNU General Public License, Version 1, February 1989 ---
+
+This software is Copyright (c) 2014 by Ingy döt Net.
+
+This is free software, licensed under:
+
+ The GNU General Public License, Version 1, February 1989
+
+ GNU GENERAL PUBLIC LICENSE
+ Version 1, February 1989
+
+ Copyright (C) 1989 Free Software Foundation, Inc.
+ 51 Franklin St, Suite 500, Boston, MA 02110-1335 USA
+
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The license agreements of most software companies try to keep users
+at the mercy of those companies. By contrast, our General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. The
+General Public License applies to the Free Software Foundation's
+software and to any other program whose authors commit to using it.
+You can use it for your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Specifically, the General Public License is designed to make
+sure that you have the freedom to give away or sell copies of free
+software, that you receive source code or can get it if you want it,
+that you can change the software or use pieces of it in new free
+programs; and that you know you can do these things.
+
+ To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+ For example, if you distribute copies of a such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have. You must make sure that they, too, receive or can get the
+source code. And you must tell them their rights.
+
+ We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+ Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software. If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+ The precise terms and conditions for copying, distribution and
+modification follow.
+
+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License Agreement applies to any program or other work which
+contains a notice placed by the copyright holder saying it may be
+distributed under the terms of this General Public License. The
+"Program", below, refers to any such program or work, and a "work based
+on the Program" means either the Program or any work containing the
+Program or a portion of it, either verbatim or with modifications. Each
+licensee is addressed as "you".
+
+ 1. You may copy and distribute verbatim copies of the Program's source
+code as you receive it, in any medium, provided that you conspicuously and
+appropriately publish on each copy an appropriate copyright notice and
+disclaimer of warranty; keep intact all the notices that refer to this
+General Public License and to the absence of any warranty; and give any
+other recipients of the Program a copy of this General Public License
+along with the Program. You may charge a fee for the physical act of
+transferring a copy.
+
+ 2. You may modify your copy or copies of the Program or any portion of
+it, and copy and distribute such modifications under the terms of Paragraph
+1 above, provided that you also do the following:
+
+ a) cause the modified files to carry prominent notices stating that
+ you changed the files and the date of any change; and
+
+ b) cause the whole of any work that you distribute or publish, that
+ in whole or in part contains the Program or any part thereof, either
+ with or without modifications, to be licensed at no charge to all
+ third parties under the terms of this General Public License (except
+ that you may choose to grant warranty protection to some or all
+ third parties, at your option).
+
+ c) If the modified program normally reads commands interactively when
+ run, you must cause it, when started running for such interactive use
+ in the simplest and most usual way, to print or display an
+ announcement including an appropriate copyright notice and a notice
+ that there is no warranty (or else, saying that you provide a
+ warranty) and that users may redistribute the program under these
+ conditions, and telling the user how to view a copy of this General
+ Public License.
+
+ d) You may charge a fee for the physical act of transferring a
+ copy, and you may at your option offer warranty protection in
+ exchange for a fee.
+
+Mere aggregation of another independent work with the Program (or its
+derivative) on a volume of a storage or distribution medium does not bring
+the other work under the scope of these terms.
+
+ 3. You may copy and distribute the Program (or a portion or derivative of
+it, under Paragraph 2) in object code or executable form under the terms of
+Paragraphs 1 and 2 above provided that you also do one of the following:
+
+ a) accompany it with the complete corresponding machine-readable
+ source code, which must be distributed under the terms of
+ Paragraphs 1 and 2 above; or,
+
+ b) accompany it with a written offer, valid for at least three
+ years, to give any third party free (except for a nominal charge
+ for the cost of distribution) a complete machine-readable copy of the
+ corresponding source code, to be distributed under the terms of
+ Paragraphs 1 and 2 above; or,
+
+ c) accompany it with the information you received as to where the
+ corresponding source code may be obtained. (This alternative is
+ allowed only for noncommercial distribution and only if you
+ received the program in object code or executable form alone.)
+
+Source code for a work means the preferred form of the work for making
+modifications to it. For an executable file, complete source code means
+all the source code for all modules it contains; but, as a special
+exception, it need not include source code for modules which are standard
+libraries that accompany the operating system on which the executable
+file runs, or for standard header files or definitions files that
+accompany that operating system.
+
+ 4. You may not copy, modify, sublicense, distribute or transfer the
+Program except as expressly provided under this General Public License.
+Any attempt otherwise to copy, modify, sublicense, distribute or transfer
+the Program is void, and will automatically terminate your rights to use
+the Program under this License. However, parties who have received
+copies, or rights to use copies, from you under this General Public
+License will not have their licenses terminated so long as such parties
+remain in full compliance.
+
+ 5. By copying, distributing or modifying the Program (or any work based
+on the Program) you indicate your acceptance of this license to do so,
+and all its terms and conditions.
+
+ 6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the original
+licensor to copy, distribute or modify the Program subject to these
+terms and conditions. You may not impose any further restrictions on the
+recipients' exercise of the rights granted herein.
+
+ 7. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of the license which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+the license, you may choose any version ever published by the Free Software
+Foundation.
+
+ 8. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission. For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this. Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 9. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 10. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ Appendix: How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to humanity, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+
+ To do so, attach the following notices to the program. It is safest to
+attach them to the start of each source file to most effectively convey
+the exclusion of warranty; and each file should have at least the
+"copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the program's name and a brief idea of what it does.>
+ Copyright (C) 19yy <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 1, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) 19xx name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the
+appropriate parts of the General Public License. Of course, the
+commands you use may be called something other than `show w' and `show
+c'; they could even be mouse-clicks or menu items--whatever suits your
+program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the
+ program `Gnomovision' (a program to direct compilers to make passes
+ at assemblers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+That's all there is to it!
+
+
+--- The Artistic License 1.0 ---
+
+This software is Copyright (c) 2014 by Ingy döt Net.
+
+This is free software, licensed under:
+
+ The Artistic License 1.0
+
+The Artistic License
+
+Preamble
+
+The intent of this document is to state the conditions under which a Package
+may be copied, such that the Copyright Holder maintains some semblance of
+artistic control over the development of the package, while giving the users of
+the package the right to use and distribute the Package in a more-or-less
+customary fashion, plus the right to make reasonable modifications.
+
+Definitions:
+
+ - "Package" refers to the collection of files distributed by the Copyright
+ Holder, and derivatives of that collection of files created through
+ textual modification.
+ - "Standard Version" refers to such a Package if it has not been modified,
+ or has been modified in accordance with the wishes of the Copyright
+ Holder.
+ - "Copyright Holder" is whoever is named in the copyright or copyrights for
+ the package.
+ - "You" is you, if you're thinking about copying or distributing this Package.
+ - "Reasonable copying fee" is whatever you can justify on the basis of media
+ cost, duplication charges, time of people involved, and so on. (You will
+ not be required to justify it to the Copyright Holder, but only to the
+ computing community at large as a market that must bear the fee.)
+ - "Freely Available" means that no fee is charged for the item itself, though
+ there may be fees involved in handling the item. It also means that
+ recipients of the item may redistribute it under the same conditions they
+ received it.
+
+1. You may make and give away verbatim copies of the source form of the
+Standard Version of this Package without restriction, provided that you
+duplicate all of the original copyright notices and associated disclaimers.
+
+2. You may apply bug fixes, portability fixes and other modifications derived
+from the Public Domain or from the Copyright Holder. A Package modified in such
+a way shall still be considered the Standard Version.
+
+3. You may otherwise modify your copy of this Package in any way, provided that
+you insert a prominent notice in each changed file stating how and when you
+changed that file, and provided that you do at least ONE of the following:
+
+ a) place your modifications in the Public Domain or otherwise make them
+ Freely Available, such as by posting said modifications to Usenet or an
+ equivalent medium, or placing the modifications on a major archive site
+ such as ftp.uu.net, or by allowing the Copyright Holder to include your
+ modifications in the Standard Version of the Package.
+
+ b) use the modified Package only within your corporation or organization.
+
+ c) rename any non-standard executables so the names do not conflict with
+ standard executables, which must also be provided, and provide a separate
+ manual page for each non-standard executable that clearly documents how it
+ differs from the Standard Version.
+
+ d) make other distribution arrangements with the Copyright Holder.
+
+4. You may distribute the programs of this Package in object code or executable
+form, provided that you do at least ONE of the following:
+
+ a) distribute a Standard Version of the executables and library files,
+ together with instructions (in the manual page or equivalent) on where to
+ get the Standard Version.
+
+ b) accompany the distribution with the machine-readable source of the Package
+ with your modifications.
+
+ c) accompany any non-standard executables with their corresponding Standard
+ Version executables, giving the non-standard executables non-standard
+ names, and clearly documenting the differences in manual pages (or
+ equivalent), together with instructions on where to get the Standard
+ Version.
+
+ d) make other distribution arrangements with the Copyright Holder.
+
+5. You may charge a reasonable copying fee for any distribution of this
+Package. You may charge any fee you choose for support of this Package. You
+may not charge a fee for this Package itself. However, you may distribute this
+Package in aggregate with other (possibly commercial) programs as part of a
+larger (possibly commercial) software distribution provided that you do not
+advertise this Package as a product of your own.
+
+6. The scripts and library files supplied as input to or produced as output
+from the programs of this Package do not automatically fall under the copyright
+of this Package, but belong to whomever generated them, and may be sold
+commercially, and may be aggregated with this Package.
+
+7. C or perl subroutines supplied by you and linked into this Package shall not
+be considered part of this Package.
+
+8. The name of the Copyright Holder may not be used to endorse or promote
+products derived from this software without specific prior written permission.
+
+9. THIS PACKAGE IS PROVIDED "AS IS" AND WITHOUT ANY EXPRESS OR IMPLIED
+WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+
+The End
+
@@ -1,167 +1,13 @@
-Build.PL
+# This file was automatically generated by Dist::Zilla::Plugin::Manifest v5.019.
+CONTRIBUTING
Changes
-inc/MyBuilder.pm
-lib/Acme/6502.pm
-lib/Acme/6502/Tube.pm
-MANIFEST This list of files
-README
-Roms/Forth-2.5.rom
-t/00.load.t
-t/leak.t
-t/monkeynes.t
-t/monkeynes/script_00.txt
-t/monkeynes/script_01.txt
-t/monkeynes/script_05.txt
-t/monkeynes/script_06.txt
-t/monkeynes/script_08.txt
-t/monkeynes/script_09.txt
-t/monkeynes/script_0A.txt
-t/monkeynes/script_0D.txt
-t/monkeynes/script_0E.txt
-t/monkeynes/script_10.txt
-t/monkeynes/script_11.txt
-t/monkeynes/script_15.txt
-t/monkeynes/script_16.txt
-t/monkeynes/script_18.txt
-t/monkeynes/script_19.txt
-t/monkeynes/script_1D.txt
-t/monkeynes/script_1E.txt
-t/monkeynes/script_20.txt
-t/monkeynes/script_21.txt
-t/monkeynes/script_24.txt
-t/monkeynes/script_25.txt
-t/monkeynes/script_26.txt
-t/monkeynes/script_28.txt
-t/monkeynes/script_29.txt
-t/monkeynes/script_2A.txt
-t/monkeynes/script_2C.txt
-t/monkeynes/script_2D.txt
-t/monkeynes/script_2E.txt
-t/monkeynes/script_30.txt
-t/monkeynes/script_31.txt
-t/monkeynes/script_35.txt
-t/monkeynes/script_36.txt
-t/monkeynes/script_38.txt
-t/monkeynes/script_39.txt
-t/monkeynes/script_3D.txt
-t/monkeynes/script_3E.txt
-t/monkeynes/script_40.txt
-t/monkeynes/script_41.txt
-t/monkeynes/script_45.txt
-t/monkeynes/script_46.txt
-t/monkeynes/script_48.txt
-t/monkeynes/script_49.txt
-t/monkeynes/script_4A.txt
-t/monkeynes/script_4C.txt
-t/monkeynes/script_4D.txt
-t/monkeynes/script_4E.txt
-t/monkeynes/script_50.txt
-t/monkeynes/script_51.txt
-t/monkeynes/script_55.txt
-t/monkeynes/script_56.txt
-t/monkeynes/script_58.txt
-t/monkeynes/script_59.txt
-t/monkeynes/script_5D.txt
-t/monkeynes/script_5E.txt
-t/monkeynes/script_60.txt
-t/monkeynes/script_61.txt
-t/monkeynes/script_65.txt
-t/monkeynes/script_66.txt
-t/monkeynes/script_68.txt
-t/monkeynes/script_69.txt
-t/monkeynes/script_6A.txt
-t/monkeynes/script_6C.txt
-t/monkeynes/script_6D.txt
-t/monkeynes/script_6E.txt
-t/monkeynes/script_70.txt
-t/monkeynes/script_71.txt
-t/monkeynes/script_75.txt
-t/monkeynes/script_76.txt
-t/monkeynes/script_78.txt
-t/monkeynes/script_79.txt
-t/monkeynes/script_7C.txt
-t/monkeynes/script_7D.txt
-t/monkeynes/script_7E.txt
-t/monkeynes/script_81.txt
-t/monkeynes/script_84.txt
-t/monkeynes/script_85.txt
-t/monkeynes/script_86.txt
-t/monkeynes/script_88.txt
-t/monkeynes/script_8A.txt
-t/monkeynes/script_8C.txt
-t/monkeynes/script_8D.txt
-t/monkeynes/script_8E.txt
-t/monkeynes/script_90.txt
-t/monkeynes/script_91.txt
-t/monkeynes/script_94.txt
-t/monkeynes/script_95.txt
-t/monkeynes/script_96.txt
-t/monkeynes/script_98.txt
-t/monkeynes/script_99.txt
-t/monkeynes/script_9A.txt
-t/monkeynes/script_9D.txt
-t/monkeynes/script_A0.txt
-t/monkeynes/script_A1.txt
-t/monkeynes/script_A2.txt
-t/monkeynes/script_A4.txt
-t/monkeynes/script_A5.txt
-t/monkeynes/script_A6.txt
-t/monkeynes/script_A8.txt
-t/monkeynes/script_A9.txt
-t/monkeynes/script_AA.txt
-t/monkeynes/script_AC.txt
-t/monkeynes/script_AD.txt
-t/monkeynes/script_AE.txt
-t/monkeynes/script_B0.txt
-t/monkeynes/script_B1.txt
-t/monkeynes/script_B4.txt
-t/monkeynes/script_B5.txt
-t/monkeynes/script_B6.txt
-t/monkeynes/script_B8.txt
-t/monkeynes/script_B9.txt
-t/monkeynes/script_BA.txt
-t/monkeynes/script_BC.txt
-t/monkeynes/script_BD.txt
-t/monkeynes/script_BE.txt
-t/monkeynes/script_C0.txt
-t/monkeynes/script_C1.txt
-t/monkeynes/script_C4.txt
-t/monkeynes/script_C5.txt
-t/monkeynes/script_C6.txt
-t/monkeynes/script_C8.txt
-t/monkeynes/script_C9.txt
-t/monkeynes/script_CA.txt
-t/monkeynes/script_CC.txt
-t/monkeynes/script_CD.txt
-t/monkeynes/script_CE.txt
-t/monkeynes/script_D0.txt
-t/monkeynes/script_D1.txt
-t/monkeynes/script_D5.txt
-t/monkeynes/script_D6.txt
-t/monkeynes/script_D8.txt
-t/monkeynes/script_D9.txt
-t/monkeynes/script_DD.txt
-t/monkeynes/script_DE.txt
-t/monkeynes/script_E0.txt
-t/monkeynes/script_E1.txt
-t/monkeynes/script_E4.txt
-t/monkeynes/script_E5.txt
-t/monkeynes/script_E6.txt
-t/monkeynes/script_E8.txt
-t/monkeynes/script_E9.txt
-t/monkeynes/script_EA.txt
-t/monkeynes/script_EC.txt
-t/monkeynes/script_ED.txt
-t/monkeynes/script_EE.txt
-t/monkeynes/script_F0.txt
-t/monkeynes/script_F1.txt
-t/monkeynes/script_F5.txt
-t/monkeynes/script_F6.txt
-t/monkeynes/script_F8.txt
-t/monkeynes/script_F9.txt
-t/monkeynes/script_FD.txt
-t/monkeynes/script_FE.txt
-t/pod-coverage.t
-t/pod.t
-META.yml
+LICENSE
+MANIFEST
META.json
+META.yml
+Makefile.PL
+README
+lib/Acme.pm
+lib/Acme.pod
+t/acme.t
+t/release-pod-syntax.t
@@ -1,10 +1,10 @@
{
- "abstract" : "Pure Perl 65C02 simulator.",
+ "abstract" : "The Base of Perfection",
"author" : [
- "Andy Armstrong <andy@hexten.net>"
+ "Ingy döt Net <ingy@cpan.org>"
],
- "dynamic_config" : 1,
- "generated_by" : "Module::Build version 0.4003, CPAN::Meta::Converter version 2.120921",
+ "dynamic_config" : 0,
+ "generated_by" : "Dist::Zilla version 5.019, CPAN::Meta::Converter version 2.132830",
"license" : [
"perl_5"
],
@@ -12,42 +12,45 @@
"url" : "http://search.cpan.org/perldoc?CPAN::Meta::Spec",
"version" : "2"
},
- "name" : "Acme-6502",
+ "name" : "Acme",
+ "no_index" : {
+ "directory" : [
+ "inc",
+ "t",
+ "xt",
+ "example"
+ ]
+ },
"prereqs" : {
"configure" : {
"requires" : {
- "Module::Build" : "0.40"
+ "ExtUtils::MakeMaker" : "6.30"
}
},
- "runtime" : {
+ "develop" : {
"requires" : {
- "Term::ReadKey" : "0",
- "Test::More" : "0",
- "version" : "0"
+ "Test::Pod" : "1.41"
}
- }
- },
- "provides" : {
- "Acme::6502" : {
- "file" : "lib/Acme/6502.pm",
- "version" : "0.77"
},
- "Acme::6502::Tube" : {
- "file" : "lib/Acme/6502/Tube.pm",
- "version" : "0.77"
+ "runtime" : {
+ "requires" : {
+ "Spiffy" : "0",
+ "perl" : "v5.8.1"
+ }
}
},
"release_status" : "stable",
"resources" : {
"bugtracker" : {
- "web" : "http://rt.cpan.org/NoAuth/Bugs.html?Dist=Acme-6502"
+ "web" : "https://github.com/ingydotnet/acme-pm/issues"
},
- "license" : [
- "http://dev.perl.org/licenses/"
- ],
+ "homepage" : "https://github.com/ingydotnet/acme-pm",
"repository" : {
- "url" : "https://github.com/AndyA/Acme--6502.git (fetch)"
+ "type" : "git",
+ "url" : "https://github.com/ingydotnet/acme-pm.git",
+ "web" : "https://github.com/ingydotnet/acme-pm"
}
},
- "version" : "0.77"
+ "version" : "1.11111111111"
}
+
@@ -1,30 +1,28 @@
---
-abstract: 'Pure Perl 65C02 simulator.'
+abstract: 'The Base of Perfection'
author:
- - 'Andy Armstrong <andy@hexten.net>'
+ - 'Ingy döt Net <ingy@cpan.org>'
build_requires: {}
configure_requires:
- Module::Build: 0.40
-dynamic_config: 1
-generated_by: 'Module::Build version 0.4003, CPAN::Meta::Converter version 2.120921'
+ ExtUtils::MakeMaker: '6.30'
+dynamic_config: 0
+generated_by: 'Dist::Zilla version 5.019, CPAN::Meta::Converter version 2.132830'
license: perl
meta-spec:
url: http://module-build.sourceforge.net/META-spec-v1.4.html
- version: 1.4
-name: Acme-6502
-provides:
- Acme::6502:
- file: lib/Acme/6502.pm
- version: 0.77
- Acme::6502::Tube:
- file: lib/Acme/6502/Tube.pm
- version: 0.77
+ version: '1.4'
+name: Acme
+no_index:
+ directory:
+ - inc
+ - t
+ - xt
+ - example
requires:
- Term::ReadKey: 0
- Test::More: 0
- version: 0
+ Spiffy: '0'
+ perl: v5.8.1
resources:
- bugtracker: http://rt.cpan.org/NoAuth/Bugs.html?Dist=Acme-6502
- license: http://dev.perl.org/licenses/
- repository: 'https://github.com/AndyA/Acme--6502.git (fetch)'
-version: 0.77
+ bugtracker: https://github.com/ingydotnet/acme-pm/issues
+ homepage: https://github.com/ingydotnet/acme-pm
+ repository: https://github.com/ingydotnet/acme-pm.git
+version: '1.11111111111'
@@ -0,0 +1,49 @@
+
+# This file was automatically generated by Dist::Zilla::Plugin::MakeMaker v5.019.
+use strict;
+use warnings;
+
+use 5.008001;
+
+use ExtUtils::MakeMaker 6.30;
+
+
+
+my %WriteMakefileArgs = (
+ "ABSTRACT" => "The Base of Perfection",
+ "AUTHOR" => "Ingy d\x{f6}t Net <ingy\@cpan.org>",
+ "CONFIGURE_REQUIRES" => {
+ "ExtUtils::MakeMaker" => "6.30"
+ },
+ "DISTNAME" => "Acme",
+ "EXE_FILES" => [],
+ "LICENSE" => "perl",
+ "NAME" => "Acme",
+ "PREREQ_PM" => {
+ "Spiffy" => 0
+ },
+ "VERSION" => "1.11111111111",
+ "test" => {
+ "TESTS" => "t/*.t"
+ }
+);
+
+
+my %FallbackPrereqs = (
+ "Spiffy" => 0
+);
+
+
+unless ( eval { ExtUtils::MakeMaker->VERSION(6.63_03) } ) {
+ delete $WriteMakefileArgs{TEST_REQUIRES};
+ delete $WriteMakefileArgs{BUILD_REQUIRES};
+ $WriteMakefileArgs{PREREQ_PM} = \%FallbackPrereqs;
+}
+
+delete $WriteMakefileArgs{CONFIGURE_REQUIRES}
+ unless eval { ExtUtils::MakeMaker->VERSION(6.52) };
+
+WriteMakefile(%WriteMakefileArgs);
+
+
+
@@ -1,30 +1,58 @@
-Acme-6502 version 0.76
+NAME
+ Acme - The Base of Perfection
-INSTALLATION
+SYNOPSIS
+ use Acme;
+ print "Acme!" if acme->is_acme and acme->is_perfect;
-To install this module, run the following commands:
+ or:
- perl Makefile.PL
- make
- make test
- make install
+ print "Acme!" if MyModule->is_acme;
+ print "Acme!" if MyModule->is_perfect;
+ print "Acme!" if MyModule->is_the_highest_point_or_stage;
+ print "Acme!"
+ if MyModule->is_one_that_represents_perfection_of_the_thing_expressed;
+ print "Acme!" if MyModule->is_the_bizzity_bomb;
+ print "Acme!" if MyModule->is_teh_shiznit;
+ print "Not!" unless YourModule->is_acme;
-Alternatively, to install with Module::Build, you can use the following commands:
+ package MyModule;
+ use Acme '-base';
- perl Build.PL
- ./Build
- ./Build test
- ./Build install
+DESCRIPTION
+ Acme.pm is a base class for perfect modules. A subclass of this module
+ is_acme by definition!
+ In other words, if you use Acme as the base, your class will be the
+ summit.
-DEPENDENCIES
+IMPLEMENTATION
+ Acme is a subclass of Spiffy.pm. As a bonus, your perfect classes will
+ be *spiffy* as well.
-None.
+ Acme also exports a function called "acme" that returns a new Acme
+ object. (which is_perfect).
-COPYRIGHT AND LICENCE
+NOTE
+ The dictionary defines 'Spiffy':
-Copyright (C) 2006-2010, Andy Armstrong
+ *Said of programs having a pretty, clever, or exceptionally
+ well-designed interface.*
+
+ How perfect!
+
+BUGS
+ This module is_perfect.
+
+AUTHOR
+ Ingy döt Net <ingy@cpan.org>
+
+COPYRIGHT AND LICENSE
+ Copyright 2004-2014. Ingy döt Net.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the same terms as Perl itself.
+
+ See <http://www.perl.com/perl/misc/Artistic.html>
-This library is free software; you can redistribute it and/or modify
-it under the same terms as Perl itself.
diff --git a/var/tmp/source/BRICAS/Acme-6502-0.77/Acme-6502-0.77/Roms/Forth-2.5.rom b/var/tmp/source/BRICAS/Acme-6502-0.77/Acme-6502-0.77/Roms/Forth-2.5.rom
deleted file mode 100644
index b1aeebf2..00000000
Binary files a/var/tmp/source/BRICAS/Acme-6502-0.77/Acme-6502-0.77/Roms/Forth-2.5.rom and /dev/null differ
@@ -1,88 +0,0 @@
-package MyBuilder;
-
-use base qw( Module::Build );
-
-sub create_build_script {
- my ( $self, @args ) = @_;
- $self->_auto_mm;
- return $self->SUPER::create_build_script( @args );
-}
-
-sub _auto_mm {
- my $self = shift;
- my $mm = $self->meta_merge;
- my @meta = qw( homepage bugtracker MailingList repository );
- for my $meta ( @meta ) {
- next if exists $mm->{resources}{$meta};
- my $auto = "_auto_$meta";
- next unless $self->can( $auto );
- my $av = $self->$auto();
- $mm->{resources}{$meta} = $av if defined $av;
- }
- $self->meta_merge( $mm );
-}
-
-sub _auto_repository {
- my $self = shift;
- if ( -d '.svn' ) {
- my $info = `svn info .`;
- return $1 if $info =~ /^URL:\s+(.+)$/m;
- }
- elsif ( -d '.git' ) {
- my $info = `git remote -v`;
- return unless $info =~ /^origin\s+(.+)$/m;
- my $url = $1;
- # Special case: patch up github URLs
- $url =~ s!^git\@github\.com:!git://github.com/!;
- return $url;
- }
- return;
-}
-
-sub _auto_bugtracker {
- 'http://rt.cpan.org/NoAuth/Bugs.html?Dist=' . shift->dist_name;
-}
-
-sub ACTION_testauthor {
- my $self = shift;
- $self->test_files( 'xt/author' );
- $self->ACTION_test;
-}
-
-sub ACTION_critic {
- exec qw( perlcritic -1 -q -profile perlcriticrc lib/ ), glob 't/*.t';
-}
-
-sub ACTION_tags {
- exec(
- qw(
- ctags -f tags --recurse --totals
- --exclude=blib
- --exclude=.svn
- --exclude='*~'
- --languages=Perl
- t/ lib/
- )
- );
-}
-
-sub ACTION_tidy {
- my $self = shift;
-
- my @extra = qw( Build.PL );
-
- my %found_files = map { %$_ } $self->find_pm_files,
- $self->_find_file_by_type( 'pm', 't' ),
- $self->_find_file_by_type( 'pm', 'inc' ),
- $self->_find_file_by_type( 't', 't' );
-
- my @files = ( keys %found_files,
- map { $self->localize_file_path( $_ ) } @extra );
-
- for my $file ( @files ) {
- system 'perltidy', '-b', $file;
- unlink "$file.bak" if $? == 0;
- }
-}
-
-1;
@@ -1,406 +0,0 @@
-package Acme::6502::Tube;
-
-use warnings;
-use strict;
-use Carp;
-use Time::HiRes qw(time);
-use Term::ReadKey ();
-use base qw(Acme::6502);
-
-our $VERSION = '0.77';
-
-use constant ERROR => 0xF800;
-
-use constant {
- PAGE => 0x0800,
- HIMEM => 0x8000
-};
-
-use constant {
- OSRDRM => 0xFFB9,
- OSEVEN => 0xFFBF,
- GSINIT => 0xFFC2,
- GSREAD => 0xFFC5,
- NVWRCH => 0xFFC8,
- NVRDCH => 0xFFCB,
- OSFIND => 0xFFCE,
- OSGBPB => 0xFFD1,
- OSBPUT => 0xFFD4,
- OSBGET => 0xFFD7,
- OSARGS => 0xFFDA,
- OSFILE => 0xFFDD,
- OSASCI => 0xFFE3,
- OSNEWL => 0xFFE7,
- OSWRCH => 0xFFEE,
- OSRDCH => 0xFFE0,
- OSWORD => 0xFFF1,
- OSBYTE => 0xFFF4,
- OSCLI => 0xFFF7
-};
-
-sub _BUILD {
- my ( $self, $args ) = @_;
-
- $self->SUPER::_BUILD( $args );
-
- $self->{ time_base } = time();
-
- # Inline OSASCI code
- $self->poke_code( OSASCI,
- 0xC9, 0x0D, # CMP #&0D
- 0xD0, 0x07, # BNE +7
- 0xA9, 0x0A, # LDA #&0A
- 0x20, 0xEE, 0xFF, # JSR &FFEE
- 0xA9, 0x0D # LDA #&0D
- );
-
- # BRK handler. The interrupt handling is bogus - so don't
- # generate any interrupts before fixing it :)
- $self->poke_code(
- 0xFF00, 0x85, 0xFC, 0x68, 0x58, 0x29, 0x10, 0xF0,
- 0x17, 0x8A, 0x48, 0xBA, 0x38, 0xBD, 0x02, 0x01,
- 0xE9, 0x01, 0x85, 0xFD, 0xBD, 0x03, 0x01, 0xE9,
- 0x00, 0x85, 0xFE, 0x68, 0xAA, 0x6C, 0x02, 0x02,
- 0x6C, 0x04, 0x02
- );
-
- $self->write_16( $self->BREAK, 0xFF00 );
-
- $self->make_vector( 'OSCLI', 0x208, \&_oscli );
- $self->make_vector( 'OSBYTE', 0x20A, \&_osbyte );
- $self->make_vector( 'OSWORD', 0x20C, \&_osword );
- $self->make_vector( 'OSWRCH', 0x20E, \&_oswrch );
- $self->make_vector( 'OSRDCH', 0x210, \&_osrdch );
- $self->make_vector( 'OSFILE', 0x212, \&_osfile );
- $self->make_vector( 'OSARGS', 0x214, \&_osargs );
- $self->make_vector( 'OSBGET', 0x216, \&_osbget );
- $self->make_vector( 'OSBPUT', 0x218, \&_osbput );
- $self->make_vector( 'OSGBPB', 0x21A, \&_osgbpb );
- $self->make_vector( 'OSFIND', 0x21C, \&_osfind );
-
- $self->set_jumptab( 0xFA00 );
-}
-
-sub _oscli {
- my $self = shift;
- my $blk = $self->get_xy();
- my $cmd = '';
- CH: for ( ;; ) {
- my $ch = $self->read_8( $blk++ );
- last CH if $ch < 0x20;
- $cmd .= chr( $ch );
- }
- $cmd =~ s/^[\s\*]+//g;
- if ( lc( $cmd ) eq 'quit' ) {
- exit;
- }
- else {
- system( $cmd );
- }
-}
-
-sub _osbyte {
- my $self = shift;
- my $a = $self->get_a();
- if ( $a == 0x7E ) {
- # Ack escape
- $self->write_8( 0xFF, 0 );
- $self->set_x( 0xFF );
- }
- elsif ( $a == 0x82 ) {
- # Read m/c high order address
- $self->set_xy( 0 );
- }
- elsif ( $a == 0x83 ) {
- # Read OSHWM (PAGE)
- $self->set_xy( PAGE );
- }
- elsif ( $a == 0x84 ) {
- # Read HIMEM
- $self->set_xy( HIMEM );
- }
- elsif ( $a == 0xDA ) {
- $self->set_xy( 0x0900 );
- }
- else {
- die sprintf( "OSBYTE %02x not handled\n", $a );
- }
-}
-
-sub _set_escape {
- my $self = shift;
- $self->write_8( 0xFF, 0xFF );
-}
-
-sub _osword {
- my $self = shift;
- my $a = $self->get_a();
- my $blk = $self->get_xy();
-
- if ( $a == 0x00 ) {
- # Command line input
- my $buf = $self->read_16( $blk );
- my $len = $self->read_8( $blk + 2 );
- my $min = $self->read_8( $blk + 3 );
- my $max = $self->read_8( $blk + 4 );
- my $y = 0;
- if ( defined( my $in = <> ) ) {
- my @c = map ord, split //, $in;
- while ( @c && $len-- > 1 ) {
- my $c = shift @c;
- if ( $c >= $min && $c <= $max ) {
- $self->write_8( $buf + $y++, $c );
- }
- }
- $self->write_8( $buf + $y++, 0x0D );
- $self->set_y( $y );
- $self->set_p( $self->get_p() & ~$self->C );
- }
- else {
- # Escape I suppose...
- $self->set_p( $self->get_p() | $self->C );
- }
- }
- elsif ( $a == 0x01 ) {
- # Read clock
- my $now = int( ( time() - $self->{ time_base } ) * 100 );
- $self->write_32( $blk, $now );
- $self->write_8( $blk + 4, 0 );
- }
- elsif ( $a == 0x02 ) {
- # Set clock
- my $tm = $self->read_32( $blk );
- $self->{ time_base } = time() - ( $tm * 100 );
- }
- else {
- die sprintf( "OSWORD %02x not handled\n", $a );
- }
-}
-
-sub _oswrch {
- my $self = shift;
- printf( "%c", $self->get_a() );
-}
-
-sub _osrdch {
- my $self = shift;
- Term::ReadKey::ReadMode( 4 );
- eval {
- my $k = ord( Term::ReadKey::ReadKey( 0 ) );
- $k = 0x0D if $k == 0x0A;
- $self->set_a( $k );
- if ( $k == 27 ) {
- $self->set_escape;
- $self->set_p( $self->get_p() | $self->C );
- }
- else {
- $self->set_p( $self->get_p() & ~$self->C );
- }
- };
- Term::ReadKey::ReadMode( 0 );
- die $@ if $@;
-}
-
-sub _osfile {
- my $self = shift;
- my $a = $self->get_a();
- my $blk = $self->get_xy();
- my $name = $self->read_str( $self->read_16( $blk ) );
- my $load = $self->read_32( $blk + 2 );
- my $exec = $self->read_32( $blk + 6 );
- my $start = $self->read_32( $blk + 10 );
- my $end = $self->read_32( $blk + 14 );
-
- # printf("%-20s %08x %08x %08x %08x\n", $name, $load, $exec, $start, $end);
- if ( $a == 0x00 ) {
- # Save
- open my $fh, '>', $name or die "Can't write $name\n";
- binmode $fh;
- my $buf = $self->read_chunk( $start, $end );
- syswrite $fh, $buf or die "Error writing $name\n";
- $self->set_a( 1 );
- }
- elsif ( $a == 0xFF ) {
- # Load
- if ( -f $name ) {
- open my $fh, '<', $name or die "Can't read $name\n";
- binmode $fh;
- my $len = -s $fh;
- sysread $fh, my $buf, $len or die "Error reading $name\n";
- $load = PAGE if $exec & 0xFF;
- $self->write_chunk( $load, $buf );
- $self->write_32( $blk + 2, $load );
- $self->write_32( $blk + 6, 0x00008023 );
- $self->write_32( $blk + 10, $len );
- $self->write_32( $blk + 14, 0x00000000 );
- $self->set_a( 1 );
- }
- elsif ( -d $name ) {
- $self->set_a( 2 );
- }
- else {
- $self->set_a( 0 );
- }
- }
- else {
- die sprintf( "OSFILE %02x not handled\n", $a );
- }
-}
-
-sub _osargs {
- die "OSARGS not handled\n";
-}
-
-sub _osbget {
- die "OSBGET not handled\n";
-}
-
-sub _osbput {
- die "OSBPUT not handled\n";
-}
-
-sub _osgbpb {
- die "OSGBPB not handled\n";
-}
-
-sub _osfind {
- die "OSFIND not handled\n";
-}
-
-sub make_vector {
- my( $self, $name, $vec, $code ) = @_;
-
- my $addr = $self->$name;
- my $vecno = scalar @{ $self->{ os } };
- push @{ $self->{ os } }, [ $code, $name ];
-
- $self->SUPER::make_vector( $addr, $vec, $vecno );
-}
-
-sub call_os {
- my $self = shift;
- my $vecno = shift;
-
- eval {
- my $call = $self->{ os }->[ $vecno ] || die "Bad OS call $vecno\n";
- $call->[ 0 ]->( $self );
- };
-
- if ( $@ ) {
- my $err = $@;
- $self->write_16( ERROR, 0x7F00 );
- $err =~ s/\s+/ /;
- $err =~ s/^\s+//;
- $err =~ s/\s+$//;
- warn $err;
- my $ep = ERROR + 2;
- for ( map ord, split //, $err ) {
- $self->write_8( $ep++, $_ );
- }
- $self->write_8( $ep++, 0x00 );
- $self->set_pc( ERROR );
- }
-}
-
-1;
-__END__
-
-=head1 NAME
-
-Acme::6502::Tube - Acorn 65C02 Second Processor Simulator
-
-=head1 VERSION
-
-This document describes Acme::6502::Tube version 0.76
-
-=head1 SYNOPSIS
-
- use Acme::6502::Tube;
-
- my $cpu = Acme::6502::Tube->new();
-
- # Load BBC Basic
- $cpu->load_rom('BASIC2.rom', 0x8000);
-
- # Init registers
- $cpu->set_pc(0x8000);
- $cpu->set_a(0x01);
- $cpu->set_s(0xFF);
- $cpu->set_p(0x22);
-
- # Run
- $cpu->run(2000_000) while 1;
-
-=head1 DESCRIPTION
-
-Emulates an Acorn BBC Micro 6502 Tube second processor. You'll need
-to find your own language ROM to load and it's only been tested with
-BBC Basic II.
-
-=head1 INTERFACE
-
-See L<Acme::6502>. C<Acme::6502::Tube> is an C<Acme::6502> instance that
-has been initialised with a skeleton Tube OS.
-
-=head1 CONFIGURATION AND ENVIRONMENT
-
-Acme::6502 requires no configuration files or environment variables.
-
-=head1 DEPENDENCIES
-
-C<Acme::6502>
-
-=head1 INCOMPATIBILITIES
-
-None reported.
-
-=head1 BUGS AND LIMITATIONS
-
-Tube OS emulation is very minimal - just enough to run BBC Basic II. If
-you extend it let me know.
-
-I've included the HCCS Forth ROM in the distribution (I used to work for
-HCCS and did a little work on the Forth ROM - although Joe Brown wrote
-it). Unfortunately it doesn't currently work with C<Acme::6502::Tube> -
-so that'll have to wait for another day.
-
-Once the Forth ROM works I'll use it to write some tests.
-
-Please report any bugs or feature requests to
-C<bug-acme-6502@rt.cpan.org>, or through the web interface at
-L<http://rt.cpan.org>.
-
-=head1 AUTHOR
-
-Andy Armstrong C<< <andy@hexten.net> >>
-
-=head1 LICENCE AND COPYRIGHT
-
-Copyright (c) 2006-2012, Andy Armstrong C<< <andy@hexten.net> >>. All
-rights reserved.
-
-This module is free software; you can redistribute it and/or
-modify it under the same terms as Perl itself. See L<perlartistic>.
-
-=head1 DISCLAIMER OF WARRANTY
-
-BECAUSE THIS SOFTWARE IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
-FOR THE SOFTWARE, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
-OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
-PROVIDE THE SOFTWARE "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
-EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE
-ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE SOFTWARE IS WITH
-YOU. SHOULD THE SOFTWARE PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL
-NECESSARY SERVICING, REPAIR, OR CORRECTION.
-
-IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
-WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
-REDISTRIBUTE THE SOFTWARE AS PERMITTED BY THE ABOVE LICENCE, BE
-LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL,
-OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE
-THE SOFTWARE (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING
-RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A
-FAILURE OF THE SOFTWARE TO OPERATE WITH ANY OTHER SOFTWARE), EVEN IF
-SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGES.
@@ -1,1125 +0,0 @@
-package Acme::6502;
-
-use warnings FATAL => 'all';
-use strict;
-use Carp;
-
-our $VERSION = '0.77';
-
-# CPU flags
-use constant {
- N => 0x80,
- V => 0x40,
- R => 0x20,
- B => 0x10,
- D => 0x08,
- I => 0x04,
- Z => 0x02,
- C => 0x01
-};
-
-use constant FLAGS => 'NVRBDIZC';
-
-# Other CPU constants
-use constant {
- STACK => 0x0100,
- BREAK => 0xFFFE
-};
-
-# Opcode to thunk into perlspace
-use constant {
- ESCAPE_OP => 0x0B,
- ESCAPE_SIG => 0xAD
-};
-
-BEGIN {
- for my $reg ( qw(a x y s p pc) ) {
- no strict 'refs';
- *{ __PACKAGE__ . "\::get_${reg}" } = sub {
- my $self = shift;
- return $self->{ reg }->{ $reg };
- };
- *{ __PACKAGE__ . "\::set_${reg}" } = sub {
- my ( $self, $v ) = @_;
- $self->{ reg }->{ $reg } = $v;
- };
- }
-}
-
-sub new {
- my $class = shift;
- my $self = bless { }, $class;
-
- $self->_BUILD( @_ );
-
- return $self;
-}
-
-my @OP_CACHE;
-
-sub _BUILD {
- my( $self, $args ) = @_;
-
- $args ||= {};
-
- $self->{ mem } = [ ( 0 ) x 65536 ];
- $self->{ reg } = {
- map { $_ => 0 } qw( a x y s p pc )
- };
- $self->{ os } = [ ];
- $self->{ jumptab } = $args->{ jumptab } || 0xFA00;
- $self->{ zn } = [ $self->Z, ( 0 ) x 127, ( $self->N ) x 128 ];
-
- my $bad_inst = $self->can( '_bad_inst' );
-
- @OP_CACHE = (
- _inst( # 00 BRK
- _push( '($pc + 1) >> 8', '($pc + 1)' ),
- _push( '$p | B' ),
- '$p = $p | I | B & ~D;',
- _jmp_i( BREAK )
- ),
- _inst( _ora( _zpix() ) ), # 01 ORA (zp, x)
- $bad_inst, # 02
- $bad_inst, # 03
- _inst( _tsb( _zp() ) ), # 04 TSB zp
- _inst( _ora( _zp() ) ), # 05 ORA zp
- _inst( _asl( _zp() ) ), # 06 ASL zp
- $bad_inst, # 07
- _inst( _push( '$p | R' ) ), # 08 PHP
- _inst( _ora( _imm() ) ), # 09 ORA #imm
- _inst( _asl( _acc() ) ), # 0A ASL A
- $bad_inst, # 0B
- _inst( _tsb( _abs() ) ), # 0C TSB zp
- _inst( _ora( _abs() ) ), # 0D ORA abs
- _inst( _asl( _abs() ) ), # 0E ASL abs
- $bad_inst, # 0F BBR0 rel
- _inst( _bfz( _rel(), N ) ), # 10 BPL rel
- _inst( _ora( _zpiy() ) ), # 11 ORA (zp), y
- _inst( _ora( _zpi() ) ), # 12 ORA (zp)
- $bad_inst, # 13
- _inst( _trb( _zpi() ) ), # 14 TRB (zp)
- _inst( _ora( _zpx() ) ), # 15 ORA zp, x
- _inst( _asl( _zpx() ) ), # 16 ASL zp, x
- $bad_inst, # 17
- _inst( '$p &= ~C;' ), # 18 CLC
- _inst( _ora( _absy() ) ), # 19 ORA abs, y
- _inst( _inc( _acc() ) ), # 1A INC A
- $bad_inst, # 1B
- _inst( _trb( _abs() ) ), # 1C TRB abs
- _inst( _ora( _absx() ) ), # 1D ORA abs, x
- _inst( _asl( _absx() ) ), # 1E ASL abs, x
- $bad_inst, # 1F BBR1 rel
- _inst( # 20 JSR
- _push( '($pc + 1) >> 8', '($pc + 1)' ),
- _jmp()
- ),
- _inst( _and( _zpix() ) ), # 21 AND (zp, x)
- $bad_inst, # 22
- $bad_inst, # 23
- _inst( _bit( _zp() ) ), # 24 BIT zp
- _inst( _and( _zp() ) ), # 25 AND zp
- _inst( _rol( _zp() ) ), # 26 ROL zp
- $bad_inst, # 27
- _inst( _pop_p() ), # 28 PLP
- _inst( _and( _imm() ) ), # 29 AND #imm
- _inst( _rol( _acc() ) ), # 2A ROL A
- $bad_inst, # 2B
- _inst( _bit( _abs() ) ), # 2C BIT abs
- _inst( _and( _abs() ) ), # 2D AND abs
- _inst( _rol( _abs() ) ), # 2E ROL abs
- $bad_inst, # 2F BBR2 rel
- _inst( _bfnz( _rel(), N ) ), # 30 BMI rel
- _inst( _and( _zpiy() ) ), # 31 AND (zp), y
- _inst( _and( _zpi() ) ), # 32 AND (zp)
- $bad_inst, # 33
- _inst( _bit( _zpx() ) ), # 34 BIT zp, x
- _inst( _and( _zpx() ) ), # 35 AND zp, x
- _inst( _rol( _zpx() ) ), # 36 ROL zp, x
- $bad_inst, # 37
- _inst( '$p |= C;' ), # 38 SEC
- _inst( _and( _absy() ) ), # 39 AND abs, y
- _inst( _dec( _acc() ) ), # 3A DEC A
- $bad_inst, # 3B
- _inst( _bit( _absx() ) ), # 3C BIT abs, x
- _inst( _and( _absx() ) ), # 3D AND abs, x
- _inst( _rol( _absx() ) ), # 3E ROL abs, x
- $bad_inst, # 3F BBR3 rel
- _inst( _rti() ), # 40 RTI
- _inst( _eor( _zpix() ) ), # 41 EOR (zp, x)
- $bad_inst, # 42
- $bad_inst, # 43
- $bad_inst, # 44
- _inst( _eor( _zp() ) ), # 45 EOR zp
- _inst( _lsr( _zp() ) ), # 46 LSR zp
- $bad_inst, # 47
- _inst( _push( '$a' ) ), # 48 PHA
- _inst( _eor( _imm() ) ), # 49 EOR imm
- _inst( _lsr( _acc() ) ), # 4A LSR A
- $bad_inst, # 4B
- _inst( _jmp() ), # 4C JMP abs
- _inst( _eor( _abs() ) ), # 4D EOR abs
- _inst( _lsr( _abs() ) ), # 4E LSR abs
- $bad_inst, # 4F BBR4 rel
- _inst( _bfz( _rel(), V ) ), # 50 BVC rel
- _inst( _eor( _zpiy() ) ), # 51 EOR (zp), y
- _inst( _eor( _zpi() ) ), # 52 EOR (zp)
- $bad_inst, # 53
- $bad_inst, # 54
- _inst( _eor( _zpx() ) ), # 55 EOR zp, x
- _inst( _lsr( _zpx() ) ), # 56 LSR zp, x
- $bad_inst, # 57
- _inst( '$p &= ~I;' ), # 58 CLI
- _inst( _eor( _absy() ) ), # 59 EOR abs, y
- _inst( _push( '$y' ) ), # 5A PHY
- $bad_inst, # 5B
- $bad_inst, # 5C
- _inst( _eor( _absx() ) ), # 5D EOR abs, x
- _inst( _lsr( _absx() ) ), # 5E LSR abs, x
- $bad_inst, # 5F BBR5 rel
- _inst( _rts() ), # 60 RTS
- _inst( _adc( _zpix() ) ), # 61 ADC (zp, x)
- $bad_inst, # 62
- $bad_inst, # 63
- _inst( _sto( _zp(), '0' ) ), # 64 STZ zp
- _inst( _adc( _zp() ) ), # 65 ADC zp
- _inst( _ror( _zp() ) ), # 66 ROR zp
- $bad_inst, # 67
- _inst( _pop( '$a' ), _status( '$a' ) ), # 68 PLA
- _inst( _adc( _imm() ) ), # 69 ADC #imm
- _inst( _ror( _acc() ) ), # 6A ROR A
- $bad_inst, # 6B
- _inst( _jmpi() ), # 6C JMP (abs)
- _inst( _adc( _abs() ) ), # 6D ADC abs
- _inst( _ror( _abs() ) ), # 6E ROR abs
- $bad_inst, # 6F BBR6 rel
- _inst( _bfnz( _rel(), V ) ), # 70 BVS rel
- _inst( _adc( _zpiy() ) ), # 71 ADC (zp), y
- _inst( _adc( _zpi() ) ), # 72 ADC (zp)
- $bad_inst, # 73
- _inst( _sto( _zpx(), '0' ) ), # 74 STZ zp, x
- _inst( _adc( _zpx() ) ), # 75 ADC zp, x
- _inst( _ror( _zpx() ) ), # 76 ROR zp, x
- $bad_inst, # 77
- _inst( '$p |= I;' ), # 78 SEI
- _inst( _adc( _absy() ) ), # 79 ADC abs, y
- _inst( _pop( '$y' ), _status( '$y' ) ), # 7A PLY
- $bad_inst, # 7B
- _inst( _jmpix() ), # 7C JMP (abs, x)
- _inst( _adc( _absx() ) ), # 7D ADC abs, x
- _inst( _ror( _absx() ) ), # 7E ROR abs, x
- $bad_inst, # 7F BBR7 rel
- _inst( _bra( _rel() ) ), # 80 BRA rel
- _inst( _sto( _zpix(), '$a' ) ), # 81 STA (zp, x)
- $bad_inst, # 82
- $bad_inst, # 83
- _inst( _sto( _zp(), '$y' ) ), # 84 STY zp
- _inst( _sto( _zp(), '$a' ) ), # 85 STA zp
- _inst( _sto( _zp(), '$x' ) ), # 86 STX zp
- $bad_inst, # 87
- _inst( _dec( ( '', '$y' ) ) ), # 88 DEY
- _inst( _bit( _imm() ) ), # 89 BIT #imm
- _inst( '$a = $x;' . _status( '$a' ) ), # 8A TXA
- $bad_inst, # 8B
- _inst( _sto( _abs(), '$y' ) ), # 8C STY abs
- _inst( _sto( _abs(), '$a' ) ), # 8D STA abs
- _inst( _sto( _abs(), '$x' ) ), # 8E STX abs
- $bad_inst, # 8F BBS0 rel
- _inst( _bfz( _rel(), C ) ), # 90 BCC rel
- _inst( _sto( _zpiy(), '$a' ) ), # 91 STA (zp), y
- _inst( _sto( _zpi(), '$a' ) ), # 92 STA (zp)
- $bad_inst, # 93
- _inst( _sto( _zpx(), '$y' ) ), # 94 STY zp, x
- _inst( _sto( _zpx(), '$a' ) ), # 95 STA zp, x
- _inst( _sto( _zpy(), '$x' ) ), # 96 STX zp, y
- $bad_inst, # 97
- _inst( '$a = $y;' . _status( '$a' ) ), # 98 TYA
- _inst( _sto( _absy(), '$a' ) ), # 99 STA abs, y
- _inst( '$s = $x;' ), # 9A TXS
- $bad_inst, # 9B
- _inst( _sto( _abs(), '0' ) ), # 9C STZ abs
- _inst( _sto( _absx(), '$a' ) ), # 9D STA abs, x
- _inst( _sto( _absx(), '0' ) ), # 9E STZ abs, x
- $bad_inst, # 9F BBS1 rel
- _inst( _lod( _imm(), '$y' ) ), # A0 LDY #imm
- _inst( _lod( _zpix(), '$a' ) ), # A1 LDA (zp, x)
- _inst( _lod( _imm(), '$x' ) ), # A2 LDX #imm
- $bad_inst, # A3
- _inst( _lod( _zp(), '$y' ) ), # A4 LDY zp
- _inst( _lod( _zp(), '$a' ) ), # A5 LDA zp
- _inst( _lod( _zp(), '$x' ) ), # A6 LDX zp
- $bad_inst, # A7
- _inst( '$y = $a;' . _status( '$y' ) ), # A8 TAY
- _inst( _lod( _imm(), '$a' ) ), # A9 LDA #imm
- _inst( '$x = $a;' . _status( '$x' ) ), # AA TAX
- $bad_inst, # AB
- _inst( _lod( _abs(), '$y' ) ), # AC LDY abs
- _inst( _lod( _abs(), '$a' ) ), # AD LDA abs
- _inst( _lod( _abs(), '$x' ) ), # AE LDX abs
- $bad_inst, # AF BBS2 rel
- _inst( _bfnz( _rel(), C ) ), # B0 BCS rel
- _inst( _lod( _zpiy(), '$a' ) ), # B1 LDA (zp), y
- _inst( _lod( _zpi(), '$a' ) ), # B2 LDA (zp)
- $bad_inst, # B3
- _inst( _lod( _zpx(), '$y' ) ), # B4 LDY zp, x
- _inst( _lod( _zpx(), '$a' ) ), # B5 LDA zp, x
- _inst( _lod( _zpy(), '$x' ) ), # B6 LDX zp, y
- $bad_inst, # B7
- _inst( '$p &= ~V;' ), # B8 CLV
- _inst( _lod( _absy(), '$a' ) ), # B9 LDA abs, y
- _inst( '$x = $s;', _set_nz( '$x' ) ), # BA TSX
- $bad_inst, # BB
- _inst( _lod( _absx(), '$y' ) ), # BC LDY abs, x
- _inst( _lod( _absx(), '$a' ) ), # BD LDA abs, x
- _inst( _lod( _absy(), '$x' ) ), # BE LDX abs, y
- $bad_inst, # BF BBS3 rel
- _inst( _cmp( _imm(), '$y' ) ), # C0 CPY #imm
- _inst( _cmp( _zpix(), '$a' ) ), # C1 CMP (zp, x)
- $bad_inst, # C2
- $bad_inst, # C3
- _inst( _cmp( _zp(), '$y' ) ), # C4 CPY zp
- _inst( _cmp( _zp(), '$a' ) ), # C5 CMP zp
- _inst( _dec( _zp() ) ), # C6 DEC zp
- $bad_inst, # C7
- _inst( _inc( ( '', '$y' ) ) ), # C8 INY
- _inst( _cmp( _imm(), '$a' ) ), # C9 CMP #imm
- _inst( _dec( ( '', '$x' ) ) ), # CA DEX
- $bad_inst, # CB
- _inst( _cmp( _abs(), '$y' ) ), # CC CPY abs
- _inst( _cmp( _abs(), '$a' ) ), # CD CMP abs
- _inst( _dec( _abs() ) ), # CE DEC abs
- $bad_inst, # CF BBS4 rel
- _inst( _bfz( _rel(), Z ) ), # D0 BNE rel
- _inst( _cmp( _zpiy(), '$a' ) ), # D1 CMP (zp), y
- _inst( _cmp( _zpi(), '$a' ) ), # D2 CMP (zp)
- $bad_inst, # D3
- $bad_inst, # D4
- _inst( _cmp( _zpx(), '$a' ) ), # D5 CMP zp, x
- _inst( _dec( _zpx() ) ), # D6 DEC zp, x
- $bad_inst, # D7
- _inst( '$p &= ~D;' ), # D8 CLD
- _inst( _cmp( _absy(), '$a' ) ), # D9 CMP abs, y
- _inst( _push( '$x' ) ), # DA PHX
- $bad_inst, # DB
- $bad_inst, # DC
- _inst( _cmp( _absx(), '$a' ) ), # DD CMP abs, x
- _inst( _dec( _absx() ) ), # DE DEC abs, x
- $bad_inst, # DF BBS5 rel
- _inst( _cmp( _imm(), '$x' ) ), # E0 CPX #imm
- _inst( _sbc( _zpix(), '$a' ) ), # E1 SBC (zp, x)
- $bad_inst, # E2
- $bad_inst, # E3
- _inst( _cmp( _zp(), '$x' ) ), # E4 CPX zp
- _inst( _sbc( _zp() ) ), # E5 SBC zp
- _inst( _inc( _zp() ) ), # E6 INC zp
- $bad_inst, # E7
- _inst( _inc( ( '', '$x' ) ) ), # E8 INX
- _inst( _sbc( _imm() ) ), # E9 SBC #imm
- _inst(), # EA NOP
- $bad_inst, # EB
- _inst( _cmp( _abs(), '$x' ) ), # EC CPX abs
- _inst( _sbc( _abs() ) ), # ED SBC abs
- _inst( _inc( _abs() ) ), # EE INC abs
- $bad_inst, # EF BBS6 rel
- _inst( _bfnz( _rel(), Z ) ), # F0 BEQ rel
- _inst( _sbc( _zpiy() ) ), # F1 SBC (zp), y
- _inst( _sbc( _zpi() ) ), # F2 SBC (zp)
- $bad_inst, # F3
- $bad_inst, # F4
- _inst( _sbc( _zpx() ) ), # F5 SBC zp, x
- _inst( _inc( _zpx() ) ), # F6 INC zp, x
- $bad_inst, # F7
- _inst( '$p |= D;' ), # F8 SED
- _inst( _sbc( _absy() ) ), # F9 SBC abs, y
- _inst( _pop( '$x' ), _status( '$x' ) ), # FA PLX
- $bad_inst, # FB
- $bad_inst, # FC
- _inst( _sbc( _absx() ) ), # FD SBC abs, x
- _inst( _inc( _absx() ) ), # FE INC abs, x
- $bad_inst, # FF BBS7 rel
- ) if !@OP_CACHE;
- $self->{ ops } = [ @OP_CACHE ];
-
- confess "Escape handler opcode not available"
- unless $self->{ ops }->[ ESCAPE_OP ] == $bad_inst;
-
- # Patch in the OS escape op handler
- $self->{ ops }->[ ESCAPE_OP ] = sub {
- my $self = shift;
- if ( $self->{ mem }->[ $self->{ reg }->{ pc } ] != ESCAPE_SIG ) {
- $bad_inst->( $self );
- }
- else {
- $self->{ reg }->{ pc } += 2;
- $self->call_os( $self->{ mem }->[ $self->{ reg }->{ pc } - 1 ] );
- }
- };
-}
-
-sub set_jumptab {
- my $self = shift;
- $self->{ jumptab } = shift;
-}
-
-sub get_state {
- my $self = shift;
- return @{ $self->{ reg } }{ qw( a x y s p pc ) };
-}
-
-sub get_xy {
- my $self = shift;
- return $self->get_x || ( $self->get_y << 8 );
-}
-
-sub set_xy {
- my $self = shift;
- my $v = shift;
- $self->set_x( $v & 0xFF );
- $self->set_y( ( $v >> 8 ) & 0xFF );
-}
-
-sub read_str {
- my $self = shift;
- my $addr = shift;
- my $str = '';
-
- while ( $self->{ mem }->[ $addr ] != 0x0D ) {
- $str .= chr( $self->{ mem }->[ $addr++ ] );
- }
-
- return $str;
-}
-
-sub read_chunk {
- my $self = shift;
- my ( $from, $to ) = @_;
-
- return pack( 'C*', @{ $self->{ mem } }[ $from .. $to - 1 ] );
-}
-
-sub write_chunk {
- my $self = shift;
- my ( $addr, $chunk ) = @_;
-
- my $len = length( $chunk );
- splice @{ $self->{ mem } }, $addr, $len, unpack( 'C*', $chunk );
-}
-
-sub read_8 {
- my $self = shift;
- my $addr = shift;
-
- return $self->{ mem }->[ $addr ];
-}
-
-sub write_8 {
- my $self = shift;
- my( $addr, $val ) = @_;
-
- $self->{ mem }->[ $addr ] = $val;
-}
-
-sub read_16 {
- my $self = shift;
- my $addr = shift;
-
- return $self->{ mem }->[ $addr ] | ( $self->{ mem }->[ $addr + 1 ] << 8 );
-}
-
-sub write_16 {
- my $self = shift;
- my( $addr, $val ) = @_;
-
- $self->{ mem }->[ $addr ] = $val & 0xFF;
- $self->{ mem }->[ $addr + 1 ] = ( $val >> 8 ) & 0xFF;
-}
-
-sub read_32 {
- my $self = shift;
- my $addr = shift;
-
- return $self->{ mem }->[ $addr ]
- | ( $self->{ mem }->[ $addr + 1 ] << 8 )
- | ( $self->{ mem }->[ $addr + 2 ] << 16 )
- | ( $self->{ mem }->[ $addr + 3 ] << 32 );
-}
-
-sub write_32 {
- my $self = shift;
- my( $addr, $val ) = @_;
-
- $self->{ mem }->[ $addr ] = $val & 0xFF;
- $self->{ mem }->[ $addr + 1 ] = ( $val >> 8 ) & 0xFF;
- $self->{ mem }->[ $addr + 2 ] = ( $val >> 16 ) & 0xFF;
- $self->{ mem }->[ $addr + 3 ] = ( $val >> 24 ) & 0xFF;
-}
-
-sub poke_code {
- my $self = shift;
- my $addr = shift;
-
- $self->{ mem }->[ $addr++ ] = $_ for @_;
-}
-
-sub load_rom {
- my $self = shift;
- my ( $f, $a ) = @_;
-
- open my $fh, '<', $f or croak "Can't read $f ($!)\n";
- binmode $fh;
- my $sz = -s $fh;
- sysread $fh, my $buf, $sz or croak "Error reading $f ($!)\n";
- close $fh;
-
- $self->write_chunk( $a, $buf );
-}
-
-sub call_os {
- croak "call_os() not supported";
-}
-
-sub run {
- my $self = shift;
- my $ic = shift;
- my $cb = shift;
-
- while ( $ic-- > 0 ) {
- my( $a, $x, $y, $s, $p, $pc ) = $self->get_state;
- $cb->( $pc, $self->{ mem }->[ $pc ], $a, $x, $y, $s, $p ) if defined $cb;
- $self->set_pc( $pc + 1 );
- $self->{ ops }->[ $self->{ mem }->[ $pc ] ]->( $self );
- }
-}
-
-sub make_vector {
- my $self = shift;
- my ( $call, $vec, $func ) = @_;
-
- $self->{ mem }->[ $call ] = 0x6C; # JMP (indirect)
- $self->{ mem }->[ $call + 1 ] = $vec & 0xFF;
- $self->{ mem }->[ $call + 2 ] = ( $vec >> 8 ) & 0xFF;
-
- my $jumptab = $self->{ jumptab };
- my $addr = $jumptab;
- $self->{ mem }->[ $jumptab++ ] = ESCAPE_OP;
- $self->{ mem }->[ $jumptab++ ] = ESCAPE_SIG;
- $self->{ mem }->[ $jumptab++ ] = $func;
- $self->{ mem }->[ $jumptab++ ] = 0x60;
-
- $self->set_jumptab( $jumptab );
-
- $self->{ mem }->[ $vec ] = $addr & 0xFF;
- $self->{ mem }->[ $vec + 1 ] = ( $addr >> 8 ) & 0xFF;
-}
-
-sub _inst {
- my $src = join( "\n", @_ );
-
- # registers
- $src =~ s{\$(a|x|y|s|p|pc)\b}{\$self->{reg}->{$1}}g;
-
- # memory and zn access
- $src =~ s{\$(mem|zn)\[}{\$self->{$1}->[}g;
-
- my $cr = eval "sub { my \$self=shift; ${src} }";
- confess "$@" if $@;
- return $cr;
-}
-
-sub _bad_inst {
- my $self = shift;
- my $pc = $self->get_pc;
-
- croak sprintf( "Bad instruction at &%04x (&%02x)\n",
- $pc - 1, $self->{ mem }->[ $pc - 1 ] );
-}
-
-# Functions that generate code fragments
-sub _set_nz {
- return
- '$p &= ~(N|Z);' . 'if( '
- . $_[0]
- . ' & 0x80){ $p |= N }'
- . 'elsif( '
- . $_[0]
- . ' == 0 ){ $p |= Z }';
-}
-
-sub _push {
- my $r = '';
- for ( @_ ) {
- $r
- .= '$mem[STACK + $s] = ('
- . $_
- . ') & 0xFF; $s = ($s - 1) & 0xFF;' . "\n";
- }
- return $r;
-}
-
-sub _pop {
- my $r = '';
- for ( @_ ) {
- $r .= '$s = ($s + 1) & 0xFF; ' . $_ . ' = $mem[STACK + $s];' . "\n";
- }
- return $r;
-}
-
-sub _pop_p {
- return '$s = ($s + 1) & 0xFF; $p = $mem[STACK + $s] | R; $p &= ~B;'
- . "\n";
-}
-
-# Addressing modes return a list containing setup code, lvalue
-sub _zpix {
- return (
- 'my $ea = $mem[$pc++] + $x; '
- . '$ea = $mem[$ea & 0xFF] | ($mem[($ea + 1) & 0xFF] << 8)' . ";\n",
- '$mem[$ea]'
- );
-}
-
-sub _zpi {
- return (
- 'my $ea = $mem[$pc++]; '
- . '$ea = $mem[$ea & 0xFF] | ($mem[($ea + 1) & 0xFF] << 8)' . ";\n",
- '$mem[$ea]'
- );
-}
-
-sub _zpiy {
- return (
- 'my $ea = $mem[$pc++]; '
- . '$ea = ($mem[$ea & 0xFF] | ($mem[($ea + 1) & 0xFF] << 8)) + $y'
- . ";\n",
- '$mem[$ea]'
- );
-}
-
-sub _zp {
- return ( 'my $ea = $mem[$pc++];' . "\n", '$mem[$ea]' );
-}
-
-sub _zpx {
- return ( 'my $ea = ($mem[$pc++] + $x) & 0xFF;' . "\n", '$mem[$ea]' );
-}
-
-sub _zpy {
- return ( 'my $ea = ($mem[$pc++] + $y) & 0xFF;' . "\n", '$mem[$ea]' );
-}
-
-sub _abs {
- return ( 'my $ea = $mem[$pc] | ($mem[$pc+1] << 8); $pc += 2;' . "\n",
- '$mem[$ea]' );
-}
-
-sub _absx {
- return (
- 'my $ea = ($mem[$pc] | ($mem[$pc+1] << 8)) + $x; $pc += 2;' . "\n",
- '$mem[$ea]'
- );
-}
-
-sub _absy {
- return (
- 'my $ea = ($mem[$pc] | ($mem[$pc+1] << 8)) + $y; $pc += 2;' . "\n",
- '$mem[$ea]'
- );
-}
-
-sub _imm {
- return ( 'my $v = $mem[$pc++];' . "\n", '$v' );
-}
-
-sub _acc {
- return ( '', '$a' );
-}
-
-sub _rel {
- # Doesn't return an lvalue
- return ( 'my $t = $mem[$pc++];' . "\n",
- '($pc + $t - (($t & 0x80) ? 0x100 : 0))' );
-}
-
-sub _status {
- my $reg = shift || '$a';
- return '$p = ($p & ~(N | Z) | $zn[' . $reg . ']);' . "\n";
-}
-
-sub _ora {
- return $_[0] . '$a |= ' . $_[1] . ";\n" . _status();
-}
-
-sub _and {
- return $_[0] . '$a &= ' . $_[1] . ";\n" . _status();
-}
-
-sub _eor {
- return $_[0] . '$a ^= ' . $_[1] . ";\n" . _status();
-}
-
-sub _bit {
- return
- $_[0]
- . '$p = ($p & ~(N|V)) | ('
- . $_[1]
- . ' & (N|V));' . "\n"
- . 'if (($a & '
- . $_[1]
- . ') == 0) { $p |= Z; } else { $p &= ~Z; }' . "\n";
-}
-
-sub _asl {
- return
- $_[0]
- . 'my $w = ('
- . $_[1]
- . ') << 1; ' . "\n"
- . 'if ($w & 0x100) { $p |= C; $w &= ~0x100; } else { $p &= ~C; }'
- . "\n"
- . _status( '$w' )
- . $_[1]
- . ' = $w;' . "\n";
-}
-
-sub _lsr {
- return
- $_[0]
- . 'my $w = '
- . $_[1] . ";\n"
- . 'if (($w & 1) != 0) { $p |= C; } else { $p &= ~C; }' . "\n"
- . '$w >>= 1;' . "\n"
- . _status( '$w' )
- . $_[1]
- . ' = $w;' . "\n";
-}
-
-sub _rol {
- return
- $_[0]
- . 'my $w = ('
- . $_[1]
- . ' << 1) | ($p & C);' . "\n"
- . 'if ($w >= 0x100) { $p |= C; $w -= 0x100; } else { $p &= ~C; };'
- . "\n"
- . _status( '$w' )
- . $_[1]
- . ' = $w;' . "\n";
-}
-
-sub _ror {
- return
- $_[0]
- . 'my $w = '
- . $_[1]
- . ' | (($p & C) << 8);' . "\n"
- . 'if (($w & 1) != 0) { $p |= C; } else { $p &= ~C; }' . "\n"
- . '$w >>= 1;' . "\n"
- . _status( '$w' )
- . $_[1]
- . ' = $w;' . "\n";
-}
-
-sub _sto {
- return $_[0] . "$_[1] = $_[2];\n";
-}
-
-sub _lod {
- return $_[0] . "$_[2] = $_[1];\n" . _status( $_[2] );
-}
-
-sub _cmp {
- return
- $_[0]
- . 'my $w = '
- . $_[2] . ' - '
- . $_[1] . ";\n"
- . 'if ($w < 0) { $w += 0x100; $p &= ~C; } else { $p |= C; }' . "\n"
- . _status( '$w' );
-}
-
-sub _tsb {
- return 'croak "TSB not supported\n";' . "\n";
-}
-
-sub _trb {
- return 'croak "TRB not supported\n";' . "\n";
-}
-
-sub _inc {
- return
- $_[0]
- . $_[1] . ' = ('
- . $_[1]
- . ' + 1) & 0xFF;' . "\n"
- . _status( $_[1] );
-}
-
-sub _dec {
- return
- $_[0]
- . $_[1] . ' = ('
- . $_[1]
- . ' + 0xFF) & 0xFF;' . "\n"
- . _status( $_[1] );
-}
-
-sub _adc {
- return
- $_[0]
- . 'my $w = '
- . $_[1] . ";\n"
- . 'if ($p & D) {' . "\n"
- . 'my $lo = ($a & 0x0F) + ($w & 0x0F) + ($p & C);' . "\n"
- . 'if ($lo > 9) { $lo += 6; }' . "\n"
- . 'my $hi = ($a >> 4) + ( $w >> 4) + ($lo > 15 ? 1 : 0);' . "\n"
- . '$a = ($lo & 0x0F) | ($hi << 4);' . "\n"
- . '$p = ($p & ~C) | ($hi > 15 ? C : 0);' . "\n"
- . '} else {' . "\n"
- . 'my $lo = $a + $w + ($p & C);' . "\n"
- . '$p &= ~(N | V | Z | C);' . "\n"
- . '$p |= (~($a ^ $w) & ($a ^ $lo) & 0x80 ? V : 0) | ($lo & 0x100 ? C : 0);'
- . "\n"
- . '$a = $lo & 0xFF;' . "\n"
- . _status() . '}' . "\n";
-}
-
-sub _sbc {
- return
- $_[0]
- . 'my $w = '
- . $_[1] . ";\n"
- . 'if ($p & D) {' . "\n"
- . 'my $lo = ($a & 0x0F) - ($w & 0x0F) - (~$p & C);' . "\n"
- . 'if ($lo & 0x10) { $lo -= 6; }' . "\n"
- . 'my $hi = ($a >> 4) - ($w >> 4) - (($lo & 0x10) >> 4);' . "\n"
- . 'if ($hi & 0x10) { $hi -= 6; }' . "\n"
- . '$a = ($lo & 0x0F) | ($hi << 4);' . "\n"
- . '$p = ($p & ~C) | ($hi > 15 ? 0 : C);' . "\n"
- . '} else {' . "\n"
- . 'my $lo = $a - $w - (~$p & C);' . "\n"
- . '$p &= ~(N | V | Z | C);' . "\n"
- . '$p |= (($a ^ $w) & ($a ^ $lo) & 0x80 ? V : 0) | ($lo & 0x100 ? 0 : C);'
- . "\n"
- . '$a = $lo & 0xFF;' . "\n"
- . _status() . '}' . "\n";
-}
-
-sub _bra {
- return $_[0] . '$pc = ' . $_[1] . ";\n";
-}
-
-sub _bfz {
- return
- $_[0]
- . 'if (($p & '
- . $_[2]
- . ') == 0) { $pc = '
- . $_[1] . '; }' . "\n";
-}
-
-sub _bfnz {
- return
- $_[0]
- . 'if (($p & '
- . $_[2]
- . ') != 0) { $pc = '
- . $_[1] . '; }' . "\n";
-}
-
-sub _jmp_i {
- my $a = shift;
- return '$pc = $mem[' . $a . '] | ($mem[' . $a . ' + 1] << 8);' . "\n";
-}
-
-sub _jmp_i_bug {
- my $a = shift;
-
- # this should emulate a page boundary bug:
- # JMP 0x80FF fetches from 0x80FF and 0x8000
- # instead of 0x80FF and 0x8100
- my $b = "($a & 0xFF00) | (($a + 1) & 0xFF)";
- return '$pc = $mem[' . $a . '] | ($mem[' . $b . '] << 8);' . "\n";
-}
-
-sub _jmp {
- return _jmp_i( '$pc' );
-}
-
-sub _jmpi {
- return 'my $w = $mem[$pc] | ($mem[$pc + 1] << 8); '
- . _jmp_i_bug( '$w' );
-}
-
-sub _jmpix {
- return 'my $w = ($mem[$pc] | ($mem[$pc + 1] << 8)) + $x; '
- . _jmp_i( '$w' );
-}
-
-sub _rti {
- return
- _pop( '$p' )
- . '$p |= R;'
- . 'my ($lo, $hi); '
- . _pop( '$lo' )
- . _pop( '$hi' )
- . '$pc = $lo | ($hi << 8);' . "\n";
-}
-
-sub _rts {
- return
- 'my ($lo, $hi); '
- . _pop( '$lo' )
- . _pop( '$hi' )
- . '$pc = ($lo | ($hi << 8)) + 1;' . "\n";
-}
-
-1;
-__END__
-
-=head1 NAME
-
-Acme::6502 - Pure Perl 65C02 simulator.
-
-=head1 VERSION
-
-This document describes Acme::6502 version 0.76
-
-=head1 SYNOPSIS
-
- use Acme::6502;
-
- my $cpu = Acme::6502->new();
-
- # Set start address
- $cpu->set_pc(0x8000);
-
- # Load ROM image
- $cpu->load_rom('myrom.rom', 0x8000);
-
- # Run for 1,000,000 instructions then return
- $cpu->run(1_000_000);
-
-=head1 DESCRIPTION
-
-Imagine the nightmare scenario: your boss tells you about a legacy
-system you have to support. How bad could it be? COBOL? Fortran? Worse:
-it's an embedded 6502 system run by a family of squirrels (see Dilberts
-passim). Fortunately there's a pure Perl 6502 emulator that works so
-well the squirrels will never know the difference.
-
-=head1 INTERFACE
-
-=over
-
-=item C<new>
-
-Create a new 6502 CPU.
-
-=item C<call_os( $vec_number )>
-
-Subclass to provide OS entry points. OS vectors are installed by calling
-C<make_vector>. When the vector is called C<call_os()> will be called
-with the vector number.
-
-=item C<get_a()>
-
-Read the current value of the processor A register (accumulator).
-
-=item C<get_p()>
-
-Read the current value of the processor status register.
-
-=item C<get_pc()>
-
-Read the current value of the program counter.
-
-=item C<get_s()>
-
-Read the current value of the stack pointer.
-
-=item C<get_x()>
-
-Read the current value of the processor X index register.
-
-=item C<get_y()>
-
-Read the current value of the processor X index register.
-
-=item C<get_xy()>
-
-Read the value of X and Y as a sixteen bit number. X forms the lower 8
-bits of the value and Y forms the upper 8 bits.
-
-=item C<get_state()>
-
-Returns an array containing the values of the A, X, Y, S, P and SP.
-
-=item C<set_a( $value )>
-
-Set the value of the processor A register (accumulator).
-
-=item C<set_p( $value )>
-
-Set the value of the processor status register.
-
-=item C<set_pc( $value )>
-
-Set the value of the program counter.
-
-=item C<set_s( $value )>
-
-Set the value of the stack pointer.
-
-=item C<set_x( $value )>
-
-Set the value of the X index register.
-
-=item C<set_y( $value )>
-
-Set the value of the Y index register.
-
-=item C<set_xy( $value )>
-
-Set the value of the X and Y registers to the specified sixteen bit
-number. X gets the lower 8 bits, Y gets the upper 8 bits.
-
-=item C<set_jumptab( $addr )>
-
-Set the address of the block of memory that will be used to hold the
-thunk blocks that correspond with vectored OS entry points. Each thunk
-takes four bytes.
-
-=item C<load_rom( $filename, $addr )>
-
-Load a ROM image at the specified address.
-
-=item C<make_vector( $jmp_addr, $vec_addr, $vec_number )>
-
-Make a vectored entry point for an emulated OS. C<$jmp_addr> is the
-address where an indirect JMP instruction (6C) will be placed,
-C<$vec_addr> is the address of the vector and C<$vec_number> will be
-passed to C<call_os> when the OS call is made.
-
-=item C<poke_code( $addr, @bytes )>
-
-Poke code directly at the specified address.
-
-=item C<read_8( $addr )>
-
-Read a byte at the specified address.
-
-=item C<read_16( $addr )>
-
-Read a sixteen bit (low, high) word at the specified address.
-
-=item C<read_32( $addr )>
-
-Read a 32 bit word at the specified address.
-
-=item C<read_chunk( $start, $end )>
-
-Read a chunk of data from C<$start> to C<$end> - 1 into a string.
-
-=item C<read_str( $addr )>
-
-Read a carriage return terminated (0x0D) string from the
-specified address.
-
-=item C<run( $count [, $callback ] )>
-
-Execute the specified number of instructions and return. Optionally a
-callback may be provided in which case it will be called before each
-instruction is executed:
-
- my $cb = sub {
- my ($pc, $inst, $a, $x, $y, $s, $p) = @_;
- # Maybe output trace info
- }
-
- $cpu->run(100, $cb);
-
-=item C<write_8( $addr, $value )>
-
-Write the byte at the specified address.
-
-=item C<write_16( $addr, $value )>
-
-Write a sixteen bit (low, high) value at the specified address.
-
-=item C<write_32( $addr, $value )>
-
-Write a 32 bit value at the specified address.
-
-=item C<write_chunk( $addr, $string )>
-
-Write a chunk of data to memory.
-
-=back
-
-=head1 DIAGNOSTICS
-
-=over
-
-=item C<< Bad instruction at %s (%s) >>
-
-The emulator hit an illegal 6502 instruction.
-
-=back
-
-=head1 CONFIGURATION AND ENVIRONMENT
-
-Acme::6502 requires no configuration files or environment variables.
-
-=head1 DEPENDENCIES
-
-None.
-
-=head1 INCOMPATIBILITIES
-
-None reported.
-
-=head1 BUGS AND LIMITATIONS
-
-Doesn't have support for hardware emulation hooks - so memory mapped I/O
-is out of the question until someone fixes it.
-
-Please report any bugs or feature requests to
-C<bug-acme-6502@rt.cpan.org>, or through the web interface at
-L<http://rt.cpan.org>.
-
-=head1 AUTHOR
-
-Andy Armstrong C<< <andy@hexten.net> >>
-
-Brian Cassidy C<< <bricas@cpan.org> >>
-
-=head1 LICENCE AND COPYRIGHT
-
-Copyright (c) 2006-2012, Andy Armstrong C<< <andy@hexten.net> >>. All
-rights reserved.
-
-This module is free software; you can redistribute it and/or
-modify it under the same terms as Perl itself. See L<perlartistic>.
-
-=head1 DISCLAIMER OF WARRANTY
-
-BECAUSE THIS SOFTWARE IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
-FOR THE SOFTWARE, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
-OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
-PROVIDE THE SOFTWARE "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
-EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE
-ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE SOFTWARE IS WITH
-YOU. SHOULD THE SOFTWARE PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL
-NECESSARY SERVICING, REPAIR, OR CORRECTION.
-
-IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
-WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
-REDISTRIBUTE THE SOFTWARE AS PERMITTED BY THE ABOVE LICENCE, BE
-LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL,
-OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE
-THE SOFTWARE (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING
-RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A
-FAILURE OF THE SOFTWARE TO OPERATE WITH ANY OTHER SOFTWARE), EVEN IF
-SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGES.
@@ -0,0 +1,21 @@
+package Acme;
+use Spiffy -Base;
+our $VERSION = '1.11111111111';
+our @EXPORT = qw(acme);
+
+sub acme() { Acme->new(@_) }
+
+package
+UNIVERSAL;
+no warnings 'once';
+
+sub is_acme { $self->isa('Acme') }
+
+*is_perfect = \&is_acme;
+*is_the_highest_point = \&is_acme;
+*is_the_highest_stage = \&is_acme;
+*is_the_highest_point_or_stage = \&is_acme;
+*is_one_that_represents_perfection_of_the_thing_expressed = \&is_acme;
+*is_the_bizzity_bomb = \&is_acme;
+*is_teh_shiznit = \&is_acme;
+*is_leon_brocard = \&is_acme;
@@ -0,0 +1,78 @@
+=pod
+
+=for comment
+DO NOT EDIT. This Pod was generated by Swim.
+See http://github.com/ingydotnet/swim-pm#readme
+
+=encoding utf8
+
+=head1 NAME
+
+Acme - The Base of Perfection
+
+=for html
+<a href="https://travis-ci.org/ingydotnet/acme-pm"><img src="https://travis-ci.org/ingydotnet/acme-pm.png" alt="acme-pm"></a>
+
+=head1 SYNOPSIS
+
+ use Acme;
+ print "Acme!" if acme->is_acme and acme->is_perfect;
+
+or:
+
+ print "Acme!" if MyModule->is_acme;
+ print "Acme!" if MyModule->is_perfect;
+ print "Acme!" if MyModule->is_the_highest_point_or_stage;
+ print "Acme!"
+ if MyModule->is_one_that_represents_perfection_of_the_thing_expressed;
+ print "Acme!" if MyModule->is_the_bizzity_bomb;
+ print "Acme!" if MyModule->is_teh_shiznit;
+
+ print "Not!" unless YourModule->is_acme;
+
+ package MyModule;
+ use Acme '-base';
+
+=head1 DESCRIPTION
+
+Acme.pm is a base class for perfect modules. A subclass of this module is_acme
+by definition!
+
+In other words, if you use Acme as the B<base>, your class will be the
+B<summit>.
+
+=head1 IMPLEMENTATION
+
+Acme is a subclass of Spiffy.pm. As a bonus, your perfect classes will be
+I<spiffy> as well.
+
+Acme also exports a function called C<acme> that returns a new Acme object.
+(which is_perfect).
+
+=head1 NOTE
+
+The dictionary defines 'Spiffy':
+
+I<Said of programs having a pretty, clever, or exceptionally well-designed
+interface.>
+
+How perfect!
+
+=head1 BUGS
+
+This module is_perfect.
+
+=head1 AUTHOR
+
+Ingy döt Net <ingy@cpan.org>
+
+=head1 COPYRIGHT AND LICENSE
+
+Copyright 2004-2014. Ingy döt Net.
+
+This program is free software; you can redistribute it and/or modify it under
+the same terms as Perl itself.
+
+See L<http://www.perl.com/perl/misc/Artistic.html>
+
+=cut
@@ -1,7 +0,0 @@
-use Test::More tests => 1;
-
-BEGIN {
- use_ok( 'Acme::6502' );
-}
-
-diag( "Testing Acme::6502 $Acme::6502::VERSION" );
@@ -0,0 +1,8 @@
+use Test::More;
+use Acme;
+
+ok(acme->is_acme);
+ok(acme->is_perfect);
+ok(acme->is_leon_brocard);
+
+done_testing;
@@ -1,20 +0,0 @@
-use strict;
-use warnings;
-
-use Test::More;
-use Acme::6502;
-use Acme::6502::Tube;
-
-eval { require Test::LeakTrace; };
-
-plan skip_all => "Test::LeakTrace require for this test" if $@;
-
-Test::LeakTrace::no_leaks_ok( sub {
- my $cpu = Acme::6502->new;
-} );
-
-Test::LeakTrace::no_leaks_ok( sub {
- my $cpu = Acme::6502::Tube->new;
-} );
-
-done_testing;
@@ -1,33 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Proper diag info, "IRQ" not "NMI"
-# *** BRK stores PC + 2
-clear
-power on
-regs
-
-# Load the IRQ Vector
-memset fffe ef
-memset ffff be
-
-# Set some bits into the PS
-memset dead ff
-op 2c adde
-
-# Should be: PS=E2
-test ps = e2
-
-op 00
-
-# Should be: PC=BEEF, I=1, B=1
-# SP=FC, Mem[$01FF]=80, Mem[$01FE]=02
-# Mem[$01FD]=F2
-
-test pc = beef
-test i = 1
-test b = 1
-test sp = fc
-test m:01ff = 80
-test m:01fe = 2
-test m:01fd = f2
-
-save verify_00.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,38 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset 00be 72
-
-op a9 55
-op 05 be
-
-# Should be: ACC=77
-test acc = 77
-
-# Negative test --------------------
-power on
-
-memset 00be aa
-
-op a9 55
-op 05 be
-
-# Should be: ACC=FF, S=1
-test acc = ff
-test s = 1
-
-# Zero test ----------------
-power on
-
-memset 00be 00
-
-op a9 00
-op 05 be
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-save verify_05.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,21 +0,0 @@
-clear
-power on
-regs
-
-# Turn on some values in the PS
-op 38
-op 78
-op F8
-
-# Should be: SP=FF, PS=2D
-test sp = ff
-test ps = 2d
-
-op 08
-
-# Should be: SP=FE, PS=2D, mem[$01FF]=2D
-test sp = fe
-test ps = 2d
-test m:01ff = 2d
-
-save verify_08.txt
@@ -1,32 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-op a9 55
-op 09 72
-
-# Should be: ACC=77
-test acc = 77
-
-# Negative test --------------------
-power on
-
-op a9 55
-op 09 aa
-
-# Should be: ACC=FF, S=1
-test acc = ff
-test s = 1
-
-# Zero test ----------------
-power on
-
-op a9 00
-op 09 00
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-save verify_09.txt
@@ -1,49 +0,0 @@
-clear
-power on
-regs
-
-# No Flags Case -------------------------
-regset acc 35
-
-op 0a
-
-# Should be: ACC=6A, C=0, Z=0, S=0
-test acc = 6a
-test c = 0
-test z = 0
-test s = 0
-
-# Carry Case ----------------------------
-regset acc ba
-
-op 0a
-
-# Should be: ACC=74, C=1, Z=0, S=0
-test acc = 74
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Case -----------------------------
-regset acc 80
-
-op 0a
-
-# Should be: ACC=0, C=1, Z=1, S=0
-test acc = 0
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Case -------------------------
-regset acc 4c
-
-op 0a
-
-# Should be: ACC=6A, C=0, Z=0, S=1
-test acc = 98
-test c = 0
-test z = 0
-test s = 1
-
-save verify_0A.txt
@@ -1,38 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset beef 72
-
-op a9 55
-op 0d efbe
-
-# Should be: ACC=77
-test acc = 77
-
-# Negative test --------------------
-power on
-
-memset beef aa
-
-op a9 55
-op 0d efbe
-
-# Should be: ACC=FF, S=1
-test acc = ff
-test s = 1
-
-# Zero test ----------------
-power on
-
-memset beef 00
-
-op a9 00
-op 0d efbe
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-save verify_0D.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,76 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks negative branching
-clear
-power on
-regs
-
-# Branch instructions cannot be tested using the op
-# command, and are loaded into memory directly and
-# setup to execute with the step command.
-
-# Branch not taken --------------------------------
-regset s 1
-regset pc 9040
-
-# Load op: BPL $40
-memset 9040 10
-memset 9041 40
-
-step
-
-# Should be: PC=9042, cycles=2
-test pc = 9042
-
-# Positive Branch taken to same page --------------
-regset s 0
-regset pc 9040
-
-# Load op: BPL $40
-memset 9040 10
-memset 9041 40
-
-step
-
-# Should be: PC=9082, cycles=3
-test pc = 9082
-
-# Negative Branch taken to same page --------------
-regset s 0
-regset pc 9040
-
-# Load op: BPL $A0
-memset 9040 10
-memset 9041 A0
-
-step
-
-# Should be: PC=8FE2, cycles=3
-test pc = 8FE2
-
-# Positive Branch taken to different page ---------
-regset s 0
-regset pc 90b0
-
-# Load op: BPL $7F
-memset 90b0 10
-memset 90b1 7f
-
-step
-
-# Should be: PC=9131, cycles=4
-test pc = 9131
-
-# Negative Branch taken to different page ---------
-regset s 0
-regset pc 9040
-
-# Load op: BPL $F7
-memset 9040 10
-memset 9041 F7
-
-step
-
-# Should be: PC=9039, cycles=4
-test pc = 9039
-
-save verify_10.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,44 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset 00c9 72
-
-op a9 55
-op a2 0b
-op 15 be
-
-# Should be: ACC=77, IX=0B
-test acc = 77
-test ix = 0b
-
-# Negative test --------------------
-power on
-
-memset 00c9 aa
-
-op a9 55
-op a2 0b
-op 15 be
-
-# Should be: ACC=FF, IX=0B, S=1
-test acc = ff
-test ix = 0b
-test s = 1
-
-# Zero test ----------------
-power on
-
-memset 00c9 00
-
-op a9 00
-op a2 0b
-op 15 be
-
-# Should be: ACC=0, IX=0B, Z=1
-test acc = 0
-test ix = 0b
-test z = 1
-
-save verify_15.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,15 +0,0 @@
-clear
-power on
-regs
-
-op 38
-
-# C flag should now be 1
-test c = 1
-
-op 18
-
-# C flag should now be 0 again
-test c = 0
-
-save verify_18.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,34 +0,0 @@
-clear
-power on
-regs
-
-# use bit to turn on V
-memset 00ab 40
-op 24 ab
-
-# V should be 1
-test v = 1
-
-# use bit to turn on S
-memset 00ab 80
-op 24 ab
-
-# S should be 1
-test s = 1
-
-# this should turn off Z
-memset 00ab 01
-op a9 ff
-op 24 ab
-
-# Z should be 0
-test z = 0
-
-# this should turn on Z
-memset 00ab 00
-op 24 ab
-
-# Z should be 1
-test z = 1
-
-save verify_24.txt
@@ -1,38 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset 00be 72
-
-op a9 55
-op 25 be
-
-# Should be: ACC=50
-test acc = 50
-
-# Zero test --------------------
-power on
-
-memset 00be aa
-
-op a9 55
-op 25 be
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-# Negative test ----------------
-power on
-
-memset 00be aa
-
-op a9 84
-op 25 be
-
-# Should be: ACC=80, S=1
-test acc = 80
-test s = 1
-
-save verify_25.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,35 +0,0 @@
-clear
-power on
-regs
-
-# Turn on some values in the PS
-op 38
-op 78
-op F8
-
-# Should be: SP=FF, PS=2D
-test sp = ff
-test ps = 2d
-
-op 08
-
-# Should be: SP=FE, PS=2D, mem[$01FF]=2D
-test sp = fe
-test ps = 2d
-test m:01ff = 2d
-
-# Clear out the values in the PS
-op 18
-op 58
-op d8
-
-# Should be: PS=20
-test ps = 20
-
-op 28
-
-# Should be: SP=FF, PS=2D
-test sp = ff
-test ps = 2d
-
-save verify_28.txt
@@ -1,32 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-op a9 55
-op 29 72
-
-# Should be: ACC=50
-test acc = 50
-
-# Zero test --------------------
-power on
-
-op a9 55
-op 29 aa
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-# Negative test ----------------
-power on
-
-op a9 84
-op 29 aa
-
-# Should be: ACC=80, S=1
-test acc = 80
-test s = 1
-
-save verify_29.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,34 +0,0 @@
-clear
-power on
-regs
-
-# use bit to turn on V
-memset 1000 40
-op 2c 0010
-
-# V should be 1
-test v = 1
-
-# use bit to turn on S
-memset 1000 80
-op 2c 0010
-
-# S should be 1
-test s = 1
-
-# this should turn off Z
-memset 1000 01
-op a9 ff
-op 2c 0010
-
-# Z should be 0
-test z = 0
-
-# this should turn on Z
-memset 1000 00
-op 2c 0010
-
-# Z should be 1
-test z = 1
-
-save verify_2C.txt
@@ -1,38 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset beef 72
-
-op a9 55
-op 2d efbe
-
-# Should be: ACC=50
-test acc = 50
-
-# Zero test --------------------
-power on
-
-memset beef aa
-
-op a9 55
-op 2d efbe
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-# Negative test ----------------
-power on
-
-memset beef aa
-
-op a9 84
-op 2d efbe
-
-# Should be: ACC=80, S=1
-test acc = 80
-test s = 1
-
-save verify_2D.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,76 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks negative branching
-clear
-power on
-regs
-
-# Branch instructions cannot be tested using the op
-# command, and are loaded into memory directly and
-# setup to execute with the step command.
-
-# Branch not taken --------------------------------
-regset s 0
-regset pc 9040
-
-# Load op: BMI $40
-memset 9040 30
-memset 9041 40
-
-step
-
-# Should be: PC=9042, cycles=2
-test pc = 9042
-
-# Positive Branch taken to same page --------------
-regset s 1
-regset pc 9040
-
-# Load op: BMI $40
-memset 9040 30
-memset 9041 40
-
-step
-
-# Should be: PC=9082, cycles=3
-test pc = 9082
-
-# Negative Branch taken to same page --------------
-regset s 1
-regset pc 9040
-
-# Load op: BMI $A0
-memset 9040 30
-memset 9041 A0
-
-step
-
-# Should be: PC=8FE2, cycles=3
-test pc = 8FE2
-
-# Positive Branch taken to different page ---------
-regset s 1
-regset pc 90b0
-
-# Load op: BMI $7F
-memset 90b0 30
-memset 90b1 7f
-
-step
-
-# Should be: PC=9131, cycles=4
-test pc = 9131
-
-# Negative Branch taken to different page ---------
-regset s 1
-regset pc 9040
-
-# Load op: BMI $F7
-memset 9040 30
-memset 9041 F7
-
-step
-
-# Should be: PC=9039, cycles=4
-test pc = 9039
-
-save verify_30.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,44 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset 00c9 72
-
-op a9 55
-op a2 0b
-op 35 be
-
-# Should be: ACC=50, IX=0B
-test acc = 50
-test ix = 0b
-
-# Zero test --------------------
-power on
-
-memset 00c9 aa
-
-op a9 55
-op a2 0b
-op 35 be
-
-# Should be: ACC=0, IX=0B, Z=1
-test acc = 0
-test ix = 0b
-test z = 1
-
-# Negative test ----------------
-power on
-
-memset 00c9 aa
-
-op a9 84
-op a2 0b
-op 35 be
-
-# Should be: ACC=80, IX=0B, S=1
-test acc = 80
-test ix = 0b
-test s = 1
-
-save verify_35.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,10 +0,0 @@
-clear
-power on
-regs
-
-op 38
-
-# C flag should now be 1
-test c = 1
-
-save verify_38.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,44 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Proper diag info, "IRQ" not "NMI"
-# *** BRK stores PC + 2, RTI goes to adress from stack
-clear
-power on
-regs
-
-# Load the IRQ Vector
-memset fffe ef
-memset ffff be
-
-# Set some bits into the PS
-memset dead ff
-op 2c adde
-
-# Should be: PS=E2
-test ps = e2
-
-op 00
-
-# Should be: PC=BEEF, I=1, B=1
-# SP=FC, Mem[$01FF]=80, Mem[$01FE]=02
-# Mem[$01FD]=F2
-
-test pc = beef
-test i = 1
-test b = 1
-test sp = fc
-test m:01ff = 80
-test m:01fe = 2
-test m:01fd = f2
-
-# Now for the RTI ----------------
-op 40
-
-# Should be: PC=8002, I=0, B=1
-# SP=FF, PS=F2
-test pc = 8002
-test i = 0
-test b = 1
-test sp = ff
-test ps = f2
-
-save verify_40.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,38 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset 00be 72
-
-op a9 55
-op 45 be
-
-# Should be: ACC=27
-test acc = 27
-
-# Negative test --------------------
-power on
-
-memset 00be aa
-
-op a9 55
-op 45 be
-
-# Should be: ACC=FF, S=1
-test acc = ff
-test s = 1
-
-# Zero test ----------------
-power on
-
-memset 00be 55
-
-op a9 55
-op 45 be
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-save verify_45.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,18 +0,0 @@
-clear
-power on
-regs
-
-op a9 55
-
-# Should be: SP=FF, ACC=55
-test sp = ff
-test acc = 55
-
-op 48
-
-# Should be: SP=FE, ACC=55, mem[$01FF]=55
-test sp = fe
-test acc = 55
-test m:01ff = 55
-
-save verify_48.txt
@@ -1,32 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-op a9 55
-op 49 72
-
-# Should be: ACC=27
-test acc = 27
-
-# Negative test --------------------
-power on
-
-op a9 55
-op 49 aa
-
-# Should be: ACC=FF, S=1
-test acc = ff
-test s = 1
-
-# Zero test ----------------
-power on
-
-op a9 55
-op 49 55
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-save verify_49.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,10 +0,0 @@
-clear
-power on
-regs
-
-op 4c efbe
-
-# Should be: PC=BEEF
-test pc = beef
-
-save verify_4C.txt
@@ -1,38 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset beef 72
-
-op a9 55
-op 4d efbe
-
-# Should be: ACC=27
-test acc = 27
-
-# Negative test --------------------
-power on
-
-memset beef aa
-
-op a9 55
-op 4d efbe
-
-# Should be: ACC=FF, S=1
-test acc = ff
-test s = 1
-
-# Zero test ----------------
-power on
-
-memset beef 55
-
-op a9 55
-op 4d efbe
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-save verify_4D.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,76 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks negative branching
-clear
-power on
-regs
-
-# Branch instructions cannot be tested using the op
-# command, and are loaded into memory directly and
-# setup to execute with the step command.
-
-# Branch not taken --------------------------------
-regset v 1
-regset pc 9040
-
-# Load op: BVC $40
-memset 9040 50
-memset 9041 40
-
-step
-
-# Should be: PC=9042, cycles=2
-test pc = 9042
-
-# Positive Branch taken to same page --------------
-regset v 0
-regset pc 9040
-
-# Load op: BVC $40
-memset 9040 50
-memset 9041 40
-
-step
-
-# Should be: PC=9082, cycles=3
-test pc = 9082
-
-# Negative Branch taken to same page --------------
-regset v 0
-regset pc 9040
-
-# Load op: BVC $A0
-memset 9040 50
-memset 9041 A0
-
-step
-
-# Should be: PC=8FE2, cycles=3
-test pc = 8FE2
-
-# Positive Branch taken to different page ---------
-regset v 0
-regset pc 90b0
-
-# Load op: BVC $7F
-memset 90b0 50
-memset 90b1 7f
-
-step
-
-# Should be: PC=9131, cycles=4
-test pc = 9131
-
-# Negative Branch taken to different page ---------
-regset v 0
-regset pc 9040
-
-# Load op: BVC $F7
-memset 9040 50
-memset 9041 F7
-
-step
-
-# Should be: PC=9039, cycles=4
-test pc = 9039
-
-save verify_50.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,44 +0,0 @@
-clear
-power on
-regs
-
-# Base test --------------------
-memset 00c9 72
-
-op a9 55
-op a2 0b
-op 55 be
-
-# Should be: ACC=27, IX=0B
-test acc = 27
-test ix = 0b
-
-# Negative test --------------------
-power on
-
-memset 00c9 aa
-
-op a9 55
-op a2 0b
-op 55 be
-
-# Should be: ACC=FF, IX=0B, S=1
-test acc = ff
-test ix = 0b
-test s = 1
-
-# Zero test ----------------
-power on
-
-memset 00c9 55
-
-op a9 55
-op a2 0b
-op 55 be
-
-# Should be: ACC=0, IX=0B, Z=1
-test acc = 0
-test ix = 0b
-test z = 1
-
-save verify_55.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,15 +0,0 @@
-clear
-power on
-regs
-
-op 78
-
-# I flag should now be 1
-test i = 1
-
-op 58
-
-# I flag should now be 0 again
-test i = 0
-
-save verify_58.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,75 +0,0 @@
-clear
-power on
-regs
-
-# No flags case ----------------------------
-memset 00be 12
-
-op 18
-op a9 55
-op 65 be
-
-# Should be: ACC=67, C=0, V=0, S=0, Z=0
-test acc = 67
-test c = 0
-test v = 0
-test s = 0
-test z = 0
-
-# Carry flag case --------------------------
-memset 00be e7
-
-op 18
-op a9 fe
-op 65 be
-
-# Should be: ACC=E5, C=1, V=0, S=1, Z=0
-test acc = e5
-test c = 1
-test v = 0
-test s = 1
-test z = 0
-
-# Overflow and Negative flag case ----------
-memset 00be 12
-
-op 18
-op a9 75
-op 65 be
-
-# Should be: ACC=67, C=0, V=1, S=1, Z=0
-test acc = 87
-test c = 0
-test v = 1
-test s = 1
-test z = 0
-
-# Zero flag case ---------------------------
-memset 00be 8e
-
-op 18
-op a9 72
-op 65 be
-
-# Should be: ACC=0, C=1, V=0, S=0, Z=1
-test acc = 0
-test c = 1
-test v = 0
-test s = 0
-test z = 1
-
-# Use Carry Flag case ----------------------
-memset 00be 12
-
-op 38
-op a9 55
-op 65 be
-
-# Should be: ACC=68, C=0, V=0, S=0, Z=0
-test acc = 68
-test c = 0
-test v = 0
-test s = 0
-test z = 0
-
-save verify_65.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,30 +0,0 @@
-clear
-power on
-regs
-
-op a9 55
-
-# Should be: SP=FF, ACC=55
-test sp = ff
-test acc = 55
-
-op 48
-
-# Should be: SP=FE, ACC=55, mem[$01FF]=55
-test sp = fe
-test acc = 55
-test m:01ff = 55
-
-# Set the ACC to something else
-op a9 01
-
-# Should be: ACC=01
-test acc = 01
-
-op 68
-
-# Should be: SP=FF, ACC=55
-test sp = ff
-test acc = 55
-
-save verify_68.txt
@@ -1,65 +0,0 @@
-clear
-power on
-regs
-
-# No flags case ----------------------------
-op 18
-op a9 55
-op 69 12
-
-# Should be: ACC=67, C=0, V=0, S=0, Z=0
-test acc = 67
-test c = 0
-test v = 0
-test s = 0
-test z = 0
-
-# Carry flag case --------------------------
-op 18
-op a9 fe
-op 69 e7
-
-# Should be: ACC=E5, C=1, V=0, S=1, Z=0
-test acc = e5
-test c = 1
-test v = 0
-test s = 1
-test z = 0
-
-# Overflow and Negative flag case ----------
-op 18
-op a9 75
-op 69 12
-
-# Should be: ACC=67, C=0, V=1, S=1, Z=0
-test acc = 87
-test c = 0
-test v = 1
-test s = 1
-test z = 0
-
-# Zero flag case ---------------------------
-op 18
-op a9 72
-op 69 8e
-
-# Should be: ACC=0, C=1, V=0, S=0, Z=1
-test acc = 0
-test c = 1
-test v = 0
-test s = 0
-test z = 1
-
-# Use Carry Flag case ----------------------
-op 38
-op a9 55
-op 69 12
-
-# Should be: ACC=68, C=0, V=0, S=0, Z=0
-test acc = 68
-test c = 0
-test v = 0
-test s = 0
-test z = 0
-
-save verify_69.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,28 +0,0 @@
-clear
-power on
-regs
-
-# Normal case -------------------
-memset beef ad
-memset bef0 de
-
-op 6c efbe
-
-# Should be: PC=DEAD
-test pc = dead
-
-# Chip Bug case -----------------
-power on
-memclear
-memset be00 de
-memset beff ad
-memset bf00 88
-
-op 6c ffbe
-
-# Should be: PC=DEAD (Not 88AD)
-regs pc
-test pc = dead
-test pc != 88ad
-
-save verify_6C.txt
@@ -1,75 +0,0 @@
-clear
-power on
-regs
-
-# No flags case ----------------------------
-memset beef 12
-
-op 18
-op a9 55
-op 6d efbe
-
-# Should be: ACC=67, C=0, V=0, S=0, Z=0
-test acc = 67
-test c = 0
-test v = 0
-test s = 0
-test z = 0
-
-# Carry flag case --------------------------
-memset beef e7
-
-op 18
-op a9 fe
-op 6d efbe
-
-# Should be: ACC=E5, C=1, V=0, S=1, Z=0
-test acc = e5
-test c = 1
-test v = 0
-test s = 1
-test z = 0
-
-# Overflow and Negative flag case ----------
-memset beef 12
-
-op 18
-op a9 75
-op 6d efbe
-
-# Should be: ACC=67, C=0, V=1, S=1, Z=0
-test acc = 87
-test c = 0
-test v = 1
-test s = 1
-test z = 0
-
-# Zero flag case ---------------------------
-memset beef 8e
-
-op 18
-op a9 72
-op 6d efbe
-
-# Should be: ACC=0, C=1, V=0, S=0, Z=1
-test acc = 0
-test c = 1
-test v = 0
-test s = 0
-test z = 1
-
-# Use Carry Flag case ----------------------
-memset beef 12
-
-op 38
-op a9 55
-op 6d efbe
-
-# Should be: ACC=68, C=0, V=0, S=0, Z=0
-test acc = 68
-test c = 0
-test v = 0
-test s = 0
-test z = 0
-
-save verify_6D.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,76 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks negative branching
-clear
-power on
-regs
-
-# Branch instructions cannot be tested using the op
-# command, and are loaded into memory directly and
-# setup to execute with the step command.
-
-# Branch not taken --------------------------------
-regset v 0
-regset pc 9040
-
-# Load op: BVS $40
-memset 9040 70
-memset 9041 40
-
-step
-
-# Should be: PC=9042, cycles=2
-test pc = 9042
-
-# Positive Branch taken to same page --------------
-regset v 1
-regset pc 9040
-
-# Load op: BVS $40
-memset 9040 70
-memset 9041 40
-
-step
-
-# Should be: PC=9082, cycles=3
-test pc = 9082
-
-# Negative Branch taken to same page --------------
-regset v 1
-regset pc 9040
-
-# Load op: BVS $A0
-memset 9040 70
-memset 9041 A0
-
-step
-
-# Should be: PC=8FE2, cycles=3
-test pc = 8FE2
-
-# Positive Branch taken to different page ---------
-regset v 1
-regset pc 90b0
-
-# Load op: BVS $7F
-memset 90b0 70
-memset 90b1 7f
-
-step
-
-# Should be: PC=9131, cycles=4
-test pc = 9131
-
-# Negative Branch taken to different page ---------
-regset v 1
-regset pc 9040
-
-# Load op: BVS $F7
-memset 9040 70
-memset 9041 F7
-
-step
-
-# Should be: PC=9039, cycles=4
-test pc = 9039
-
-save verify_70.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,75 +0,0 @@
-clear
-power on
-regs
-
-# No flags case ----------------------------
-memset 00be 12
-
-op 18
-op a9 55
-op 75 be
-
-# Should be: ACC=67, C=0, V=0, S=0, Z=0
-test acc = 67
-test c = 0
-test v = 0
-test s = 0
-test z = 0
-
-# Carry flag case --------------------------
-memset 00be e7
-
-op 18
-op a9 fe
-op 75 be
-
-# Should be: ACC=E5, C=1, V=0, S=1, Z=0
-test acc = e5
-test c = 1
-test v = 0
-test s = 1
-test z = 0
-
-# Overflow and Negative flag case ----------
-memset 00be 12
-
-op 18
-op a9 75
-op 75 be
-
-# Should be: ACC=67, C=0, V=1, S=1, Z=0
-test acc = 87
-test c = 0
-test v = 1
-test s = 1
-test z = 0
-
-# Zero flag case ---------------------------
-memset 00be 8e
-
-op 18
-op a9 72
-op 75 be
-
-# Should be: ACC=0, C=1, V=0, S=0, Z=1
-test acc = 0
-test c = 1
-test v = 0
-test s = 0
-test z = 1
-
-# Use Carry Flag case ----------------------
-memset 00be 12
-
-op 38
-op a9 55
-op 75 be
-
-# Should be: ACC=68, C=0, V=0, S=0, Z=0
-test acc = 68
-test c = 0
-test v = 0
-test s = 0
-test z = 0
-
-save verify_75.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,10 +0,0 @@
-clear
-power on
-regs
-
-op 78
-
-# I flag should now be 1
-test i = 1
-
-save verify_78.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,17 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks that it jumps to $mem[ $BEFA + $BEFB ]
-clear
-power on
-regs
-
-# Set jump location
-memset befa ad
-memset befb de
-
-op a2 0b
-op 7c efbe
-
-# Should be: PC=DEAD
-test pc = dead
-
-save verify_7C.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,15 +0,0 @@
-clear
-power on
-regs
-
-# Set mem[$0072] to some other value 1st
-memset 0072 ab
-
-op a0 55
-op 84 72
-
-# mem[$0072] and IY should = $55
-test iy = 55
-test m:0072 = 55
-
-save verify_84.txt
@@ -1,15 +0,0 @@
-clear
-power on
-regs
-
-# Set mem[$0072] to some other value 1st
-memset 0072 ab
-
-op a9 55
-op 85 72
-
-# mem[$0072] and ACC should = $55
-test acc = 55
-test m:0072 = 55
-
-save verify_85.txt
@@ -1,15 +0,0 @@
-clear
-power on
-regs
-
-# Set mem[$0072] to some other value 1st
-memset 0072 ab
-
-op a2 55
-op 86 72
-
-# mem[$0072] and IX should = $55
-test ix = 55
-test m:0072 = 55
-
-save verify_86.txt
@@ -1,44 +0,0 @@
-clear
-power on
-regs
-
-op a0 55
-
-# IY should now be set to 55
-test iy = 55
-
-op 88
-
-# IY should now be set to 54
-test iy = 54
-
-# Wrap and negative case --------------
-power on
-
-op a0 00
-
-# IY should now be set to 00
-test iy = 0
-
-op 88
-
-# Should be: IY=FF, S=1
-test iy = ff
-test s = 1
-
-# Zero case --------------------------
-power on
-
-op a0 01
-
-# Should be: IY=01, Z=0
-test iy = 1
-test z = 0
-
-op 88
-
-# Should be: IY=00, Z=1
-test iy = 0
-test z = 1
-
-save verify_88.txt
@@ -1,58 +0,0 @@
-clear
-power on
-regs
-
-op a2 55
-
-# IX should now show $55
-test ix = 55
-
-op 8a
-
-# ACC and IX should now show $55
-test acc = 55
-test ix = 55
-
-# Now for the Z flag case --------------------
-power on
-
-op a9 55
-op a2 00
-
-# Use the IY register to reset Z
-op a0 01
-
-# Should be: ACC=55, IX=0, Z=0
-test acc = 55
-test ix = 0
-test z = 0
-
-op 8a
-
-# Should be: ACC=0, IX=0, Z=1
-test acc = 0
-test ix = 0
-test z = 1
-
-# Now for the S flag case --------------------
-power on
-
-op a9 55
-op a2 f2
-
-# Use the IY register to reset S
-op a0 01
-
-# Should be: ACC=55, IX=F2, S=0
-test acc = 55
-test ix = f2
-test s = 0
-
-op 8a
-
-# Should be: ACC=F2, IX=F2, S=1
-test acc = f2
-test ix = f2
-test s = 1
-
-save verify_8A.txt
@@ -1,12 +0,0 @@
-clear
-power on
-regs
-
-op a0 55
-op 8c efbe
-
-# mem[$BEEF] and IY should = $55
-test iy = 55
-test m:beef = 55
-
-save verify_8C.txt
@@ -1,12 +0,0 @@
-clear
-power on
-regs
-
-op a9 55
-op 8d efbe
-
-# mem[$BEEF] and ACC should = $55
-test acc = 55
-test m:beef = 55
-
-save verify_8D.txt
@@ -1,12 +0,0 @@
-clear
-power on
-regs
-
-op a2 55
-op 8e efbe
-
-# mem[$BEEF] and IX should = $55
-test ix = 55
-test m:beef = 55
-
-save verify_8E.txt
@@ -1,76 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks negative branching
-clear
-power on
-regs
-
-# Branch instructions cannot be tested using the op
-# command, and are loaded into memory directly and
-# setup to execute with the step command.
-
-# Branch not taken --------------------------------
-regset c 1
-regset pc 9040
-
-# Load op: BCC $40
-memset 9040 90
-memset 9041 40
-
-step
-
-# Should be: PC=9042, cycles=2
-test pc = 9042
-
-# Positive Branch taken to same page --------------
-regset c 0
-regset pc 9040
-
-# Load op: BCC $40
-memset 9040 90
-memset 9041 40
-
-step
-
-# Should be: PC=9082, cycles=3
-test pc = 9082
-
-# Negative Branch taken to same page --------------
-regset c 0
-regset pc 9040
-
-# Load op: BCC $A0
-memset 9040 90
-memset 9041 A0
-
-step
-
-# Should be: PC=8FE2, cycles=3
-test pc = 8FE2
-
-# Positive Branch taken to different page ---------
-regset c 0
-regset pc 90b0
-
-# Load op: BCC $7F
-memset 90b0 90
-memset 90b1 7f
-
-step
-
-# Should be: PC=9131, cycles=4
-test pc = 9131
-
-# Negative Branch taken to different page ---------
-regset c 0
-regset pc 9040
-
-# Load op: BCC $F7
-memset 9040 90
-memset 9041 F7
-
-step
-
-# Should be: PC=9039, cycles=4
-test pc = 9039
-
-save verify_90.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,28 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks $mem[$0002] and not $mem[$0102] as
-# *** zero page mode wraps
-clear
-power on
-regs
-
-# The "stay within zero page" condition
-op a0 55
-op a2 0b
-op 94 be
-
-# Should be: IY=55, IX=0B, mem[$00C9]=55
-test iy = 55
-test ix = 0b
-test m:00c9 = 55
-
-# The "overshoot the zero page" condition
-op a0 62
-op a2 0b
-op 94 f7
-
-# Should be: IY=62, IX=0B, mem[$0002]=62
-test iy = 62
-test ix = 0b
-test m:0002 = 62
-
-save verify_94.txt
@@ -1,28 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks $mem[$0002] and not $mem[$0102] as
-# *** zero page mode wraps
-clear
-power on
-regs
-
-# The "stay within zero page" condition
-op a9 55
-op a2 0b
-op 95 be
-
-# Should be: ACC=55, IX=0B, mem[$00C9]=55
-test acc = 55
-test ix = 0b
-test m:00c9 = 55
-
-# The "overshoot the zero page" condition
-op a9 62
-op a2 0b
-op 95 f7
-
-# Should be: ACC=62, IX=0B, mem[$0002]=62
-test acc = 62
-test ix = 0b
-test m:0002 = 62
-
-save verify_95.txt
@@ -1,28 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks $mem[$0002] and not $mem[$0102] as
-# *** zero page mode wraps
-clear
-power on
-regs
-
-# The "stay within zero page" condition
-op a2 55
-op a0 0b
-op 96 be
-
-# Should be: IY=0B, IX=55, mem[$00C9]=55
-test iy = 0b
-test ix = 55
-test m:00c9 = 55
-
-# The "overshoot the zero page" condition
-op a2 62
-op a0 0b
-op 96 f7
-
-# Should be: IY=0B, IX=62, mem[$0002]=62
-test iy = 0b
-test ix = 62
-test m:0002 = 62
-
-save verify_96.txt
@@ -1,58 +0,0 @@
-clear
-power on
-regs
-
-op a0 55
-
-# IY should now show $55
-test iy = 55
-
-op 98
-
-# ACC and IY should now show $55
-test acc = 55
-test iy = 55
-
-# Now for the Z flag case --------------------
-power on
-
-op a9 55
-op a0 00
-
-# Use the IX register to reset Z
-op a2 01
-
-# Should be: ACC=55, IY=0, Z=0
-test acc = 55
-test iy = 0
-test z = 0
-
-op 98
-
-# Should be: ACC=0, IY=0, Z=1
-test acc = 0
-test iy = 0
-test z = 1
-
-# Now for the S flag case --------------------
-power on
-
-op a9 55
-op a0 f2
-
-# Use the IX register to reset S
-op a2 01
-
-# Should be: ACC=55, IY=F2, S=0
-test acc = 55
-test iy = f2
-test s = 0
-
-op 98
-
-# Should be: ACC=F2, IY=F2, S=1
-test acc = f2
-test iy = f2
-test s = 1
-
-save verify_98.txt
@@ -1,14 +0,0 @@
-clear
-power on
-regs
-
-op a9 55
-op a0 0B
-op 99 efbe
-
-# Should be: ACC=55, IY=0B, mem[$BEFA]=55
-test acc = 55
-test iy = 0b
-test m:befa = 55
-
-save verify_99.txt
@@ -1,16 +0,0 @@
-clear
-power on
-regs
-
-op a2 55
-
-# IX should now show $55
-test ix = 55
-
-op 9a
-
-# SP and IX should now show $55
-test sp = 55
-test ix = 55
-
-save verify_9A.txt
@@ -1,14 +0,0 @@
-clear
-power on
-regs
-
-op a9 55
-op a2 0B
-op 9d efbe
-
-# Should be: ACC=55, IX=0B, mem[$BEFA]=55
-test acc = 55
-test ix = 0b
-test m:befa = 55
-
-save verify_9D.txt
@@ -1,24 +0,0 @@
-clear
-power on
-regs
-
-op a0 55
-
-# IY should now show $55
-test iy = 55
-
-op a0 00
-
-# IY should be 0 and Z should be 1
-test iy = 0
-test z = 1
-
-op a0 f2
-
-# IY should be f2 and S should be 1
-test iy = f2
-test s = 1
-
-regs
-
-save verify_A0.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,24 +0,0 @@
-clear
-power on
-regs
-
-op a2 55
-
-# IX should now show $55
-test ix = 55
-
-op a2 00
-
-# IX should be 0 and Z should be 1
-test ix = 0
-test z = 1
-
-op a2 f2
-
-# IX should be f2 and S should be 1
-test ix = f2
-test s = 1
-
-regs
-
-save verify_A2.txt
@@ -1,33 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition ------------
-
-memset 0072 55
-op a4 72
-
-# Should be: IY=55
-test iy = 55
-
-# Zero condition ------------
-power on
-
-memset 0072 00
-op a4 72
-
-# Should be: IY=0, Z=1
-test iy = 0
-test z = 1
-
-# Negative condition ------------
-power on
-
-memset 0072 f2
-op a4 72
-
-# Should be: IY=F2, S=1
-test iy = f2
-test s = 1
-
-save verify_A4.txt
@@ -1,33 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition ------------
-
-memset 0072 55
-op a5 72
-
-# Should be: ACC=55
-test acc = 55
-
-# Zero condition ------------
-power on
-
-memset 0072 00
-op a5 72
-
-# Should be: ACC=0, Z=1
-test acc = 0
-test z = 1
-
-# Negative condition ------------
-power on
-
-memset 0072 f2
-op a5 72
-
-# Should be: ACC=F2, S=1
-test acc = f2
-test s = 1
-
-save verify_A5.txt
@@ -1,31 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition ------------
-
-memset 0072 55
-op a6 72
-
-# Should be: IX=55
-test ix = 55
-
-# Zero condition ------------
-
-memset 0072 00
-op a6 72
-
-# Should be: IX=0, Z=1
-test ix = 0
-test z = 1
-
-# Negative condition ------------
-
-memset 0072 f2
-op a6 72
-
-# Should be: IX=F2, S=1
-test ix = f2
-test s = 1
-
-save verify_A6.txt
@@ -1,58 +0,0 @@
-clear
-power on
-regs
-
-op a9 55
-
-# ACC should now show $55
-test acc = 55
-
-op a8
-
-# ACC and IY should now show $55
-test acc = 55
-test iy = 55
-
-# Now for the Z flag case --------------------
-power on
-
-op a9 00
-op a0 55
-
-# Use the IX register to reset Z
-op a2 01
-
-# Should be: ACC=0, IY=55, Z=0
-test acc = 0
-test iy = 55
-test z = 0
-
-op a8
-
-# Should be: ACC=0, IY=0, Z=1
-test acc = 0
-test iy = 0
-test z = 1
-
-# Now for the S flag case --------------------
-power on
-
-op a9 f2
-op a0 55
-
-# Use the IX register to reset S
-op a2 01
-
-# Should be: ACC=F2, IY=55, S=0
-test acc = f2
-test iy = 55
-test s = 0
-
-op a8
-
-# Should be: ACC=F2, IY=F2, S=1
-test acc = f2
-test iy = f2
-test s = 1
-
-save verify_A8.txt
@@ -1,24 +0,0 @@
-clear
-power on
-regs
-
-op a9 55
-
-# ACC should now show $55
-test acc = 55
-
-op a9 00
-
-# ACC should be 0 and Z should be 1
-test acc = 0
-test z = 1
-
-op a9 f2
-
-# ACC should be f2 and S should be 1
-test acc = f2
-test s = 1
-
-regs
-
-save verify_A9.txt
@@ -1,58 +0,0 @@
-clear
-power on
-regs
-
-op a9 55
-
-# ACC should now show $55
-test acc = 55
-
-op aa
-
-# ACC and IX should now show $55
-test acc = 55
-test ix = 55
-
-# Now for the Z flag case --------------------
-power on
-
-op a9 00
-op a2 55
-
-# Use the IY register to reset Z
-op a0 01
-
-# Should be: ACC=0, IX=55, Z=0
-test acc = 0
-test ix = 55
-test z = 0
-
-op aa
-
-# Should be: ACC=0, IX=0, Z=1
-test acc = 0
-test ix = 0
-test z = 1
-
-# Now for the S flag case --------------------
-power on
-
-op a9 f2
-op a2 55
-
-# Use the IY register to reset S
-op a0 01
-
-# Should be: ACC=F2, IX=55, S=0
-test acc = f2
-test ix = 55
-test s = 0
-
-op aa
-
-# Should be: ACC=F2, IX=F2, S=1
-test acc = f2
-test ix = f2
-test s = 1
-
-save verify_AA.txt
@@ -1,27 +0,0 @@
-clear
-power on
-regs
-
-memset beef 55
-op ac efbe
-
-# IY should now show $55
-test iy = 55
-
-memset beef 00
-op ac efbe
-
-# IY should be 0 and Z should be 1
-test iy = 0
-test z = 1
-
-memset beef f2
-op ac efbe
-
-# IY should be f2 and S should be 1
-test iy = f2
-test s = 1
-
-regs
-
-save verify_AC.txt
@@ -1,27 +0,0 @@
-clear
-power on
-regs
-
-memset beef 55
-op ad efbe
-
-# ACC should now show $55
-test acc = 55
-
-memset beef 00
-op ad efbe
-
-# ACC should be 0 and Z should be 1
-test acc = 0
-test z = 1
-
-memset beef f2
-op ad efbe
-
-# ACC should be f2 and S should be 1
-test acc = f2
-test s = 1
-
-regs
-
-save verify_AD.txt
@@ -1,27 +0,0 @@
-clear
-power on
-regs
-
-memset beef 55
-op ae efbe
-
-# IX should now show $55
-test ix = 55
-
-memset beef 00
-op ae efbe
-
-# IX should be 0 and Z should be 1
-test ix = 0
-test z = 1
-
-memset beef f2
-op ae efbe
-
-# IX should be f2 and S should be 1
-test ix = f2
-test s = 1
-
-regs
-
-save verify_AE.txt
@@ -1,76 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks negative branching
-clear
-power on
-regs
-
-# Branch instructions cannot be tested using the op
-# command, and are loaded into memory directly and
-# setup to execute with the step command.
-
-# Branch not taken --------------------------------
-regset c 0
-regset pc 9040
-
-# Load op: BCS $40
-memset 9040 B0
-memset 9041 40
-
-step
-
-# Should be: PC=9042, cycles=2
-test pc = 9042
-
-# Positive Branch taken to same page --------------
-regset c 1
-regset pc 9040
-
-# Load op: BCS $40
-memset 9040 B0
-memset 9041 40
-
-step
-
-# Should be: PC=9082, cycles=3
-test pc = 9082
-
-# Negative Branch taken to same page --------------
-regset c 1
-regset pc 9040
-
-# Load op: BCS $A0
-memset 9040 B0
-memset 9041 A0
-
-step
-
-# Should be: PC=8FE2, cycles=3
-test pc = 8FE2
-
-# Positive Branch taken to different page ---------
-regset c 1
-regset pc 90b0
-
-# Load op: BCS $7F
-memset 90b0 B0
-memset 90b1 7f
-
-step
-
-# Should be: PC=9131, cycles=4
-test pc = 9131
-
-# Negative Branch taken to different page ---------
-regset c 1
-regset pc 9040
-
-# Load op: BCS $F7
-memset 9040 B0
-memset 9041 F7
-
-step
-
-# Should be: PC=9039, cycles=4
-test pc = 9039
-
-save verify_B0.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,39 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition ------------
-
-memset 009a 55
-op a2 28
-op b4 72
-
-# Should be: IY=55, IX=28
-test iy = 55
-test ix = 28
-
-# Zero condition ------------
-power on
-
-memset 009a 00
-op a2 28
-op b4 72
-
-# Should be: IY=0, IX=28, Z=1
-test iy = 0
-test ix = 28
-test z = 1
-
-# Negative condition ------------
-power on
-
-memset 009a f2
-op a2 28
-op b4 72
-
-# Should be: IY=F2, IX=28, S=1
-test iy = f2
-test ix = 28
-test s = 1
-
-save verify_B4.txt
@@ -1,38 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition ------------
-memset 009a 55
-op a2 28
-op b5 72
-
-# Should be: ACC=55, IX=28
-test acc = 55
-test ix = 28
-
-# Zero condition ------------
-power on
-
-memset 009a 00
-op a2 28
-op b5 72
-
-# Should be: ACC=0, IX=28, Z=1
-test acc = 0
-test ix = 28
-test z = 1
-
-# Negative condition ------------
-power on
-
-memset 009a f2
-op a2 28
-op b5 72
-
-# Should be: ACC=F2, IX=28, S=1
-test acc = f2
-test ix = 28
-test s = 1
-
-save verify_B5.txt
@@ -1,38 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition ------------
-memset 009a 55
-op a0 28
-op b6 72
-
-# Should be: IX=55, IY=28
-test ix = 55
-test iy = 28
-
-# Zero condition ------------
-power on
-
-memset 009a 00
-op a0 28
-op b6 72
-
-# Should be: IX=0, IY=28, Z=1
-test ix = 0
-test iy = 28
-test z = 1
-
-# Negative condition ------------
-power on
-
-memset 009a f2
-op a0 28
-op b6 72
-
-# Should be: IX=F2, IY=28, S=1
-test ix = f2
-test iy = 28
-test s = 1
-
-save verify_B6.txt
@@ -1,17 +0,0 @@
-clear
-power on
-regs
-
-# create an overflow
-memset 1000 40
-op 2c 0010
-
-# V flag should now be 1
-test v = 1
-
-op b8
-
-# V flag should now be 0 again
-test v = 0
-
-save verify_B8.txt
@@ -1,49 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition (No Page Boundry) ------
-memset 839a 55
-op a0 28
-op b9 7283
-
-# Should be: ACC=55, IY=28, Cycles=4
-test acc = 55
-test iy = 28
-
-# Normal condition (Page Boundry) ---------
-power on
-
-memset 845f 55
-op a0 ed
-op b9 7283
-
-# Should be: ACC=55, IY=ED, Cycles=5
-test acc = 55
-test iy = ed
-
-# Zero condition --------------
-power on
-
-memset 839a 00
-op a0 28
-op b9 7283
-
-# Should be: ACC=0, IY=28, Z=1, Cycles=4
-test acc = 0
-test iy = 28
-test z = 1
-
-# Negative condition ----------
-power on
-
-memset 839a f2
-op a0 28
-op b9 7283
-
-# Should be: ACC=F2, IY=28, S=1, Cycles=4
-test acc = f2
-test iy = 28
-test s = 1
-
-save verify_B9.txt
@@ -1,67 +0,0 @@
-clear
-power on
-regs
-
-op a2 55
-
-# IX should now show $55
-test ix = 55
-
-op 9a
-op a2 00
-
-# Only SP should now show $55
-test ix = 0
-test sp = 55
-
-op ba
-
-# SP and IX should now show $55
-test sp = 55
-test ix = 55
-
-# Now for the Z flag case --------------------
-power on
-
-op a2 00
-op 9a
-op a2 55
-
-# Clear Z with the ACC
-op a9 01
-
-# Should be: IX=55, SP=0, Z=0
-test ix = 55
-test sp = 0
-test z = 0
-
-op ba
-
-# SP and IX should now show $00 and Z should be 1
-test sp = 0
-test ix = 0
-test z = 1
-
-# Now for the S flag case --------------------
-power on
-
-op a2 f2
-op 9a
-op a2 55
-
-# Clear S with the ACC
-op a9 01
-
-# Should be: IX=55, SP=F2, S=0
-test ix = 55
-test sp = f2
-test s = 0
-
-op ba
-
-# SP and IX should now show $f2 and S should be 1
-test sp = f2
-test ix = f2
-test s = 1
-
-save verify_BA.txt
@@ -1,49 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition (No Page Boundry) ------
-memset 839a 55
-op a2 28
-op bc 7283
-
-# Should be: IY=55, IX=28, Cycles=4
-test iy = 55
-test ix = 28
-
-# Normal condition (Page Boundry) ---------
-power on
-
-memset 845f 55
-op a2 ed
-op bc 7283
-
-# Should be: IY=55, IX=ED, Cycles=5
-test iy = 55
-test ix = ed
-
-# Zero condition --------------
-power on
-
-memset 839a 00
-op a2 28
-op bc 7283
-
-# Should be: IY=0, IX=28, Z=1, Cycles=4
-test iy = 0
-test ix = 28
-test z = 1
-
-# Negative condition ----------
-power on
-
-memset 839a f2
-op a2 28
-op bc 7283
-
-# Should be: IY=F2, IX=28, S=1, Cycles=4
-test iy = f2
-test ix = 28
-test s = 1
-
-save verify_BC.txt
@@ -1,49 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition (No Page Boundry) ------
-memset 839a 55
-op a2 28
-op bd 7283
-
-# Should be: ACC=55, IX=28, Cycles=4
-test acc = 55
-test ix = 28
-
-# Normal condition (Page Boundry) ---------
-power on
-
-memset 845f 55
-op a2 ed
-op bd 7283
-
-# Should be: ACC=55, IX=ED, Cycles=5
-test acc = 55
-test ix = ed
-
-# Zero condition --------------
-power on
-
-memset 839a 00
-op a2 28
-op bd 7283
-
-# Should be: ACC=0, IX=28, Z=1, Cycles=4
-test acc = 0
-test ix = 28
-test z = 1
-
-# Negative condition ----------
-power on
-
-memset 839a f2
-op a2 28
-op bd 7283
-
-# Should be: ACC=F2, IX=28, S=1, Cycles=4
-test acc = f2
-test ix = 28
-test s = 1
-
-save verify_BD.txt
@@ -1,49 +0,0 @@
-clear
-power on
-regs
-
-# Normal condition (No Page Boundry) ------
-memset 839a 55
-op a0 28
-op be 7283
-
-# Should be: IX=55, IY=28, Cycles=4
-test ix = 55
-test iy = 28
-
-# Normal condition (Page Boundry) ---------
-power on
-
-memset 845f 55
-op a0 ed
-op be 7283
-
-# Should be: IX=55, IY=ED, Cycles=5
-test ix = 55
-test iy = ed
-
-# Zero condition --------------
-power on
-
-memset 839a 00
-op a0 28
-op be 7283
-
-# Should be: IX=0, IY=28, Z=1, Cycles=4
-test ix = 0
-test iy = 28
-test z = 1
-
-# Negative condition ----------
-power on
-
-memset 839a f2
-op a0 28
-op be 7283
-
-# Should be: IX=F2, IY=28, S=1, Cycles=4
-test ix = f2
-test iy = 28
-test s = 1
-
-save verify_BE.txt
@@ -1,37 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-op a0 55
-op c0 2b
-
-# Should be: IY=55, C=1, Z=0, S=0
-test iy = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-op a0 55
-op c0 55
-
-# Should be: IY=55, C=1, Z=1, S=0
-test iy = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-op a0 35
-op c0 55
-
-# Should be: IY=35, C=0, Z=0, S=1
-test iy = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_C0.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,43 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-memset 00be 2b
-
-op a0 55
-op c4 be
-
-# Should be: IY=55, C=1, Z=0, S=0
-test iy = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-memset 00be 55
-
-op a0 55
-op c4 be
-
-# Should be: IY=55, C=1, Z=1, S=0
-test iy = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-memset 00be 55
-
-op a0 35
-op c4 be
-
-# Should be: IY=35, C=0, Z=0, S=1
-test iy = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_C4.txt
@@ -1,43 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-memset 00be 2b
-
-op a9 55
-op c5 be
-
-# Should be: ACC=55, C=1, Z=0, S=0
-test acc = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-memset 00be 55
-
-op a9 55
-op c5 be
-
-# Should be: ACC=55, C=1, Z=1, S=0
-test acc = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-memset 00be 55
-
-op a9 35
-op c5 be
-
-# Should be: ACC=35, C=0, Z=0, S=1
-test acc = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_C5.txt
@@ -1,33 +0,0 @@
-clear
-power on
-regs
-
-memset 0072 55
-
-op c6 72
-
-# memory[$0072] should show 54
-test m:0072 = 54
-
-# Wrap and Negative case -------------
-power on
-memset 0072 00
-
-op c6 72
-
-# Should be: memory[$0072]=FF, S=1
-test m:0072 = ff
-test s = 1
-
-# Zero case -------------------
-power on
-
-memset 0072 01
-
-op c6 72
-
-# Should be: memory[$0072]=00, Z=1
-test m:0072 = 00
-test z = 1
-
-save verify_C6.txt
@@ -1,48 +0,0 @@
-clear
-power on
-regs
-
-op a0 55
-
-# IY should now be set to 55
-test iy = 55
-
-op c8
-
-# IY should now be set to 56
-test iy = 56
-
-# Wrap and Zero case --------------
-power on
-
-op a0 ff
-
-# IY should now be set to ff
-test iy = ff
-
-op c8
-
-# Should be: IY=0, Z=1
-test iy = 0
-test z = 1
-
-# Negative case --------------------
-power on
-
-op a0 ef
-
-# Clear S with ACC
-op a9 01
-
-# Should be: IY=EF, S=0
-test iy = ef
-test s = 0
-
-op c8
-
-# Should be: IY=F0, S=1
-test iy = F0
-test s = 1
-
-
-save verify_C8.txt
@@ -1,37 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-op a9 55
-op c9 2b
-
-# Should be: ACC=55, C=1, Z=0, S=0
-test acc = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-op a9 55
-op c9 55
-
-# Should be: ACC=55, C=1, Z=1, S=0
-test acc = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-op a9 35
-op c9 55
-
-# Should be: ACC=35, C=0, Z=0, S=1
-test acc = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_C9.txt
@@ -1,44 +0,0 @@
-clear
-power on
-regs
-
-op a2 55
-
-# IX should now be set to 55
-test ix = 55
-
-op ca
-
-# IX should now be set to 54
-test ix = 54
-
-# Wrap and negative case --------------
-power on
-
-op a2 00
-
-# IX should now be set to 00
-test ix = 0
-
-op ca
-
-# Should be: IX=FF, S=1
-test ix = ff
-test s = 1
-
-# Zero case ----------------------------
-power on
-
-op a2 01
-
-# Should be: IX=01, Z=0
-test ix = 1
-test z = 0
-
-op ca
-
-# Should be: IX=00, Z=1
-test ix = 0
-test z = 1
-
-save verify_CA.txt
@@ -1,43 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-memset beef 2b
-
-op a0 55
-op cc efbe
-
-# Should be: IY=55, C=1, Z=0, S=0
-test iy = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-memset beef 55
-
-op a0 55
-op cc efbe
-
-# Should be: IY=55, C=1, Z=1, S=0
-test iy = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-memset beef 55
-
-op a0 35
-op cc efbe
-
-# Should be: IY=35, C=0, Z=0, S=1
-test iy = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_CC.txt
@@ -1,43 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-memset beef 2b
-
-op a9 55
-op cd efbe
-
-# Should be: ACC=55, C=1, Z=0, S=0
-test acc = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-memset beef 55
-
-op a9 55
-op cd efbe
-
-# Should be: ACC=55, C=1, Z=1, S=0
-test acc = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-memset beef 55
-
-op a9 35
-op cd efbe
-
-# Should be: ACC=35, C=0, Z=0, S=1
-test acc = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_CD.txt
@@ -1,33 +0,0 @@
-clear
-power on
-regs
-
-memset beef 55
-
-op ce efbe
-
-# memory[$BEEF] should show 54
-test m:beef = 54
-
-# Wrap and Negative case -------------
-power on
-memset beef 00
-
-op ce efbe
-
-# Should be: memory[$BEEF]=FF, S=1
-test m:beef = ff
-test s = 1
-
-# Zero case -------------------
-power on
-
-memset beef 01
-
-op ce efbe
-
-# Should be: memory[$BEEF]=00, Z=1
-test m:beef = 00
-test z = 1
-
-save verify_CE.txt
@@ -1,76 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks negative branching
-clear
-power on
-regs
-
-# Branch instructions cannot be tested using the op
-# command, and are loaded into memory directly and
-# setup to execute with the step command.
-
-# Branch not taken --------------------------------
-regset z 1
-regset pc 9040
-
-# Load op: BNE $40
-memset 9040 D0
-memset 9041 40
-
-step
-
-# Should be: PC=9042, cycles=2
-test pc = 9042
-
-# Positive Branch taken to same page --------------
-regset z 0
-regset pc 9040
-
-# Load op: BNE $40
-memset 9040 D0
-memset 9041 40
-
-step
-
-# Should be: PC=9082, cycles=3
-test pc = 9082
-
-# Negative Branch taken to same page --------------
-regset z 0
-regset pc 9040
-
-# Load op: BNE $A0
-memset 9040 D0
-memset 9041 A0
-
-step
-
-# Should be: PC=8FE2, cycles=3
-test pc = 8FE2
-
-# Positive Branch taken to different page ---------
-regset z 0
-regset pc 90b0
-
-# Load op: BNE $7F
-memset 90b0 D0
-memset 90b1 7f
-
-step
-
-# Should be: PC=9131, cycles=4
-test pc = 9131
-
-# Negative Branch taken to different page ---------
-regset z 0
-regset pc 9040
-
-# Load op: BNE $F7
-memset 9040 D0
-memset 9041 F7
-
-step
-
-# Should be: PC=9039, cycles=4
-test pc = 9039
-
-save verify_D0.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,49 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-memset 00c9 2b
-
-op a9 55
-op a2 0b
-op d5 be
-
-# Should be: ACC=55, IX=0B, C=1, Z=0, S=0
-test acc = 55
-test ix = 0b
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-memset 00c9 55
-
-op a9 55
-op a2 0b
-op d5 be
-
-# Should be: ACC=55, IX=0B, C=1, Z=1, S=0
-test acc = 55
-test ix = 0b
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-memset 00c9 55
-
-op a9 35
-op a2 0b
-op d5 be
-
-# Should be: ACC=35, IX=0B, C=0, Z=0, S=1
-test acc = 35
-test ix = 0b
-test c = 0
-test z = 0
-test s = 1
-
-save verify_D5.txt
@@ -1,37 +0,0 @@
-clear
-power on
-regs
-
-memset 00c9 55
-op a2 0b
-op d6 be
-
-# Should be: mem[$00C9]=54, IX=0B
-test ix = 0b
-test m:00c9 = 54
-
-# Wrap and Negative case -------------
-power on
-
-memset 00c9 00
-op a2 0b
-op d6 be
-
-# Should be: memory[$00C9]=FF, S=1
-test m:00c9 = ff
-test ix = 0b
-test s = 1
-
-# Zero case -------------------
-power on
-
-memset 00c9 01
-op a2 0b
-op d6 be
-
-# Should be: memory[$00C9]=00, Z=1
-test m:00c9 = 00
-test ix = 0b
-test z = 1
-
-save verify_D6.txt
@@ -1,17 +0,0 @@
-clear
-power on
-regs
-
-# this instruction is 6502 compatible but not
-# supported by the NES
-op f8
-
-# D flag should now be 1
-test d = 1
-
-op d8
-
-# D flag should now be 0 again
-test d = 0
-
-save verify_D8.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,37 +0,0 @@
-clear
-power on
-regs
-
-memset befa 55
-op a2 0b
-op de efbe
-
-# Should be: mem[$BEFA]=54, IX=0B
-test ix = 0b
-test m:befa = 54
-
-# Wrap and Negative case -------------
-power on
-
-memset befa 00
-op a2 0b
-op de efbe
-
-# Should be: memory[$BEFA]=FF, S=1
-test m:befa = ff
-test ix = 0b
-test s = 1
-
-# Zero case -------------------
-power on
-
-memset befa 01
-op a2 0b
-op de efbe
-
-# Should be: memory[$BEFA]=00, Z=1
-test m:befa = 00
-test ix = 0b
-test z = 1
-
-save verify_DE.txt
@@ -1,37 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-op a2 55
-op e0 2b
-
-# Should be: IX=55, C=1, Z=0, S=0
-test ix = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-op a2 55
-op e0 55
-
-# Should be: IX=55, C=1, Z=1, S=0
-test ix = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-op a2 35
-op e0 55
-
-# Should be: IX=35, C=0, Z=0, S=1
-test ix = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_E0.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,43 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-memset 00be 2b
-
-op a2 55
-op e4 be
-
-# Should be: IX=55, C=1, Z=0, S=0
-test ix = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-memset 00be 55
-
-op a2 55
-op e4 be
-
-# Should be: IX=55, C=1, Z=1, S=0
-test ix = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-memset 00be 55
-
-op a2 35
-op e4 be
-
-# Should be: IX=35, C=0, Z=0, S=1
-test ix = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_E4.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,33 +0,0 @@
-clear
-power on
-regs
-
-memset 0072 55
-
-op e6 72
-
-# memory[$0072] should show 56
-test m:0072 = 56
-
-# Wrap and Zero case -------------
-power on
-memset 0072 ff
-
-op e6 72
-
-# Should be: memory[$0072]=0, Z=1
-test m:0072 = 0
-test z = 1
-
-# Negative case -------------------
-power on
-
-memset 0072 7f
-
-op e6 72
-
-# Should be: memory[$0072]=80, S=1
-test m:0072 = 80
-test s = 1
-
-save verify_E6.txt
@@ -1,47 +0,0 @@
-clear
-power on
-regs
-
-op a2 55
-
-# IX should now be set to 55
-test ix = 55
-
-op e8
-
-# IX should now be set to 56
-test ix = 56
-
-# Wrap and Zero case --------------
-power on
-
-op a2 ff
-
-# IX should now be set to ff
-test ix = ff
-
-op e8
-
-# Should be: IX=0, Z=1
-test ix = 0
-test z = 1
-
-# Negative case --------------------
-power on
-
-op a2 ef
-
-# Clear S with ACC
-op a9 01
-
-# Should be: IX=EF, S=0
-test ix = ef
-test s = 0
-
-op e8
-
-# Should be: IX=F0, S=1
-test ix = F0
-test s = 1
-
-save verify_E8.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,10 +0,0 @@
-clear
-power on
-regs
-
-op ea
-
-# should be no change except the PC
-regs
-
-save verify_EA.txt
@@ -1,43 +0,0 @@
-clear
-power on
-regs
-
-# Carry Flag Case -------------------
-memset beef 2b
-
-op a2 55
-op ec efbe
-
-# Should be: IX=55, C=1, Z=0, S=0
-test ix = 55
-test c = 1
-test z = 0
-test s = 0
-
-# Zero Flag Case --------------------
-power on
-memset beef 55
-
-op a2 55
-op ec efbe
-
-# Should be: IX=55, C=1, Z=1, S=0
-test ix = 55
-test c = 1
-test z = 1
-test s = 0
-
-# Negative Flag Case ----------------
-power on
-memset beef 55
-
-op a2 35
-op ec efbe
-
-# Should be: IX=35, C=0, Z=0, S=1
-test ix = 35
-test c = 0
-test z = 0
-test s = 1
-
-save verify_EC.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,33 +0,0 @@
-clear
-power on
-regs
-
-memset beef 55
-
-op ee efbe
-
-# memory[$BEEF] should show 56
-test m:beef = 56
-
-# Wrap and Zero case -------------
-power on
-memset beef ff
-
-op ee efbe
-
-# Should be: memory[$BEEF]=0, Z=1
-test m:beef = 0
-test z = 1
-
-# Negative case -------------------
-power on
-
-memset beef 7f
-
-op ee efbe
-
-# Should be: memory[$BEEF]=80, S=1
-test m:beef = 80
-test s = 1
-
-save verify_EE.txt
@@ -1,76 +0,0 @@
-# *** MODIFIED TEST FROM ORIGINAL MONKEYNES
-# *** Now properly checks negative branching
-clear
-power on
-regs
-
-# Branch instructions cannot be tested using the op
-# command, and are loaded into memory directly and
-# setup to execute with the step command.
-
-# Branch not taken --------------------------------
-regset z 0
-regset pc 9040
-
-# Load op: BEQ $40
-memset 9040 F0
-memset 9041 40
-
-step
-
-# Should be: PC=9042, cycles=2
-test pc = 9042
-
-# Positive Branch taken to same page --------------
-regset z 1
-regset pc 9040
-
-# Load op: BEQ $40
-memset 9040 F0
-memset 9041 40
-
-step
-
-# Should be: PC=9082, cycles=3
-test pc = 9082
-
-# Negative Branch taken to same page --------------
-regset z 1
-regset pc 9040
-
-# Load op: BEQ $A0
-memset 9040 F0
-memset 9041 A0
-
-step
-
-# Should be: PC=8FE2, cycles=3
-test pc = 8FE2
-
-# Positive Branch taken to different page ---------
-regset z 1
-regset pc 90b0
-
-# Load op: BEQ $7F
-memset 90b0 F0
-memset 90b1 7f
-
-step
-
-# Should be: PC=9131, cycles=4
-test pc = 9131
-
-# Negative Branch taken to different page ---------
-regset z 1
-regset pc 9040
-
-# Load op: BEQ $F7
-memset 9040 F0
-memset 9041 F7
-
-step
-
-# Should be: PC=9039, cycles=4
-test pc = 9039
-
-save verify_F0.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,37 +0,0 @@
-clear
-power on
-regs
-
-memset 00c9 55
-op a2 0b
-op f6 be
-
-# Should be: mem[$00C9]=56, IX=0B
-test m:00c9 = 56
-test ix = 0b
-
-# Wrap and Zero case -------------
-power on
-
-memset 00c9 ff
-op a2 0b
-op f6 be
-
-# Should be: memory[$00C9]=0, IX=0B, Z=1
-test m:00c9 = 0
-test ix = 0b
-test z = 1
-
-# Negative case -------------------
-power on
-
-memset 00c9 7f
-op a2 0b
-op f6 be
-
-# Should be: memory[$00C9]=80, IX=0B, S=1
-test m:00c9 = 80
-test ix = 0b
-test s = 1
-
-save verify_F6.txt
@@ -1,12 +0,0 @@
-clear
-power on
-regs
-
-# this instruction is 6502 compatible but not
-# supported by the NES
-op f8
-
-# D flag should now be 1
-test d = 1
-
-save verify_F8.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,5 +0,0 @@
-clear
-power on
-regs
-
-save verify_XX.txt
@@ -1,37 +0,0 @@
-clear
-power on
-regs
-
-memset befa 55
-op a2 0b
-op fe efbe
-
-# Should be: mem[$BEFA]=56, IX=0B
-test m:befa = 56
-test ix = 0b
-
-# Wrap and Zero case -------------
-power on
-
-memset befa ff
-op a2 0b
-op fe efbe
-
-# Should be: memory[$BEFA]=0, IX=0B, Z=1
-test m:befa = 0
-test ix = 0b
-test z = 1
-
-# Negative case -------------------
-power on
-
-memset befa 7f
-op a2 0b
-op fe efbe
-
-# Should be: memory[$BEFA]=80, IX=0B, S=1
-test m:befa = 80
-test ix = 0b
-test s = 1
-
-save verify_FE.txt
@@ -1,205 +0,0 @@
-use strict;
-use warnings;
-
-use Test::More 'no_plan';
-
-BEGIN {
- use_ok( 'Acme::6502' );
-}
-
-my %test_lut = (
- m => sub {
- return shift->read_8( hex shift );
- },
- ps => sub {
- return shift->get_p;
- },
- pc => sub {
- return shift->get_pc;
- },
- sp => sub {
- return shift->get_s;
- },
- acc => sub {
- return shift->get_a;
- },
- ix => sub {
- return shift->get_x;
- },
- iy => sub {
- return shift->get_y;
- },
- s => sub {
- return $_[0]->get_p & $_[0]->N ? 1 : 0;
- },
- v => sub {
- return $_[0]->get_p & $_[0]->V ? 1 : 0;
- },
- b => sub {
- return $_[0]->get_p & $_[0]->B ? 1 : 0;
- },
- d => sub {
- return $_[0]->get_p & $_[0]->D ? 1 : 0;
- },
- i => sub {
- return $_[0]->get_p & $_[0]->I ? 1 : 0;
- },
- z => sub {
- return $_[0]->get_p & $_[0]->Z ? 1 : 0;
- },
- c => sub {
- return $_[0]->get_p & $_[0]->C ? 1 : 0;
- },
-);
-
-my %regset_lut = (
- ps => sub {
- shift->set_p( shift );
- },
- pc => sub {
- shift->set_pc( shift );
- },
- sp => sub {
- shift->set_s( shift );
- },
- acc => sub {
- shift->set_a( shift );
- },
- ix => sub {
- shift->set_x( shift );
- },
- iy => sub {
- shift->set_y( shift );
- },
- s => sub {
- $_[0]->set_p( $_[0]->get_p & ~$_[0]->N );
- $_[0]->set_p( $_[0]->get_p | $_[0]->N ) if $_[1];
- },
- v => sub {
- $_[0]->set_p( $_[0]->get_p & ~$_[0]->V );
- $_[0]->set_p( $_[0]->get_p | $_[0]->V ) if $_[1];
- },
- b => sub {
- $_[0]->set_p( $_[0]->get_p & ~$_[0]->B );
- $_[0]->set_p( $_[0]->get_p | $_[0]->B ) if $_[1];
- },
- d => sub {
- $_[0]->set_p( $_[0]->get_p & ~$_[0]->D );
- $_[0]->set_p( $_[0]->get_p | $_[0]->D ) if $_[1];
- },
- i => sub {
- $_[0]->set_p( $_[0]->get_p & ~$_[0]->I );
- $_[0]->set_p( $_[0]->get_p | $_[0]->I ) if $_[1];
- },
- z => sub {
- $_[0]->set_p( $_[0]->get_p & ~$_[0]->Z );
- $_[0]->set_p( $_[0]->get_p | $_[0]->Z ) if $_[1];
- },
- c => sub {
- $_[0]->set_p( $_[0]->get_p & ~$_[0]->C );
- $_[0]->set_p( $_[0]->get_p | $_[0]->C ) if $_[1];
- },
-);
-
-my $glob = $ENV{TEST_OP} || '*';
-my @files = glob( "t/monkeynes/script_${glob}.txt" );
-
-for my $file ( @files ) {
- open( my $script, $file ) || die qq(cannot load test script "$file");
- _diag( qq(Running script "$file") );
- my @lines = <$script>;
- chomp( @lines );
- run_script( @lines );
- close( $script );
-}
-
-sub run_script {
- my $cpu;
- for ( @_ ) {
- chomp;
- next if m{^\s*$};
- next if m{^save};
- if ( m{^# (.+)} ) {
- _diag( $1 );
- }
- elsif ( $_ eq 'clear' ) {
- next;
- }
- elsif ( $_ eq 'power on' ) {
- $cpu = Acme::6502->new();
- $cpu->set_s( 255 );
- $cpu->set_p( $cpu->get_p | $cpu->R );
- isa_ok( $cpu, 'Acme::6502' );
- }
- elsif ( $_ eq 'memclear' ) {
- $cpu->poke_code( 0, ( 0 ) x 65536 );
- _diag( 'Mem cleared' );
- }
- elsif ( $_ eq 'step' ) {
- _diag( 'Running next instruction...' );
- $cpu->run( 1 );
- }
- elsif ( m{^regset (.+) (.+)} ) {
- $regset_lut{ lc $1 }->( $cpu, hex $2 );
- _diag( "$1 set to $2" );
- }
- elsif ( m{^regs(?: (.+))?} ) {
- diag_regs( $cpu, $1 );
- }
- elsif ( m{^memset (.+) (.+)} ) {
- $cpu->write_8( hex $1, hex $2 );
- is( $cpu->read_8( hex $1 ), hex $2, "Mem[$1] set to $2" );
- }
- elsif ( m{^test (.+) (.+) (.+)} ) {
- my ( $op, @args ) = split( /:/, $1 );
- my $cmp = $2;
- $cmp = '==' if $cmp eq '=';
- cmp_ok( $test_lut{ lc $op }->( $cpu, @args ),
- $cmp, hex $3, "$1 $2 $3" );
- }
- elsif ( m{^op (.+)} ) {
- my ( $op, $args_hex ) = split( ' ', $1 );
- _diag( "OP: $1" );
- $args_hex = '' unless defined $args_hex;
- my @args = ( $args_hex =~ m{(..)}g );
- my $pc = hex( 8000 );
- $cpu->poke_code(
- $pc,
- map { hex( $_ || 0 ) } $op,
- @args[ 0 .. 1 ]
- );
- $cpu->set_pc( $pc );
- $cpu->run( 1 );
- }
- else {
- use Data::Dumper;
- warn Dumper $_;
- }
- }
-}
-
-sub diag_regs {
- my $cpu = shift;
- my $reg = uc( defined $_[0] ? $_[0] : '' );
-
- _diag( 'CPU Registers' ) if !$reg;
- _diag( sprintf ' PC: $%X', $cpu->get_pc )
- if !$reg || $reg eq 'PC';
- _diag( sprintf ' SP: $%X', $cpu->get_s ) if !$reg || $reg eq 'SP';
- _diag( sprintf ' ACC: $%X', $cpu->get_a )
- if !$reg || $reg eq 'ACC';
- _diag( sprintf ' IX: $%X', $cpu->get_x ) if !$reg || $reg eq 'IX';
- _diag( sprintf ' IY: $%X', $cpu->get_y ) if !$reg || $reg eq 'IY';
- # this should be fixed to handle just one flag at a time
- _diag( ' Flags S V - B D I Z C' )
- if !$reg || $reg =~ m{^(PS|[SVBDIZC])$};
- _diag(
- sprintf ' PS: %d %d %d %d %d %d %d %d',
- split( //, sprintf( '%08b', $cpu->get_p ) )
- ) if !$reg || $reg =~ m{^(PS|[SVBDIZC])$};
-}
-
-sub _diag {
- return unless $ENV{DIAG_6502};
- diag( @_ );
-}
@@ -1,13 +0,0 @@
-#!perl -T
-
-use Test::More;
-eval "use Test::Pod::Coverage 1.04";
-plan skip_all =>
- "Test::Pod::Coverage 1.04 required for testing POD coverage"
- if $@;
-all_pod_coverage_ok(
- {
- private =>
- [ qr{^BUILD|DEMOLISH|AUTOMETHOD|START$}, qr{^_}, qr{call_os}, qr{make_vector} ]
- }
-);
@@ -1,6 +0,0 @@
-#!perl -T
-
-use Test::More;
-eval "use Test::Pod 1.14";
-plan skip_all => "Test::Pod 1.14 required for testing POD" if $@;
-all_pod_files_ok();
@@ -0,0 +1,14 @@
+#!perl
+
+BEGIN {
+ unless ($ENV{RELEASE_TESTING}) {
+ require Test::More;
+ Test::More::plan(skip_all => 'these tests are for release candidate testing');
+ }
+}
+
+# This file was automatically generated by Dist::Zilla::Plugin::PodSyntaxTests.
+use Test::More;
+use Test::Pod 1.41;
+
+all_pod_files_ok();