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Search results for "verilog"

Verilog::Std - SystemVerilog Built-in std Package Definition River stage zero No dependents

Verilog::Std contains the built-in "std" package required by the SystemVerilog standard....

WSNYDER/Verilog-Perl-3.482 - 23 Jan 2024 02:49:53 UTC - Search in distribution

Verilog::VCD - Parse a Verilog VCD text file River stage zero No dependents

Verilog is a Hardware Description Language (HDL) used to model digital logic. While simulating logic circuits, the values of signals can be written out to a Value Change Dump (VCD) file. This module can be used to parse a VCD file so that further ana...

GSULLIVAN/Verilog-VCD-0.08 - 04 May 2018 14:48:07 UTC - Search in distribution

Verilog::CodeGen - Verilog code generator River stage zero No dependents

Provides an object-oriented environment to generate Verilog code for modules and testbenches. The Verilog::CodeGen module provides two functions, one to create a code template and another to create a Perl module which contains the device library. Thi...

WVDB/Verilog-CodeGen-0.9.4 - 09 May 2003 14:55:35 UTC - Search in distribution

Verilog::Readmem - Parse Verilog $readmemh or $readmemb text file River stage zero No dependents

The Verilog Hardware Description Language (HDL) provides a convenient way to load a memory during logic simulation. The "$readmemh()" and "$readmemb()" system tasks are used in the HDL source code to import the contents of a text file into a memory v...

GSULLIVAN/Verilog-Readmem-0.05 - 09 Jul 2015 14:26:47 UTC - Search in distribution

Text::EP3::Verilog - Verilog extension for the EP3 preprocessor. River stage zero No dependents

This module is an EP3 extension for the Verilog Hardware Description Language. The signal directive @signal key definition Take a list of signals and generate signal lists in the differing formats that Verilog uses. This is accomplished by formatting...

GSPIVEY/Text-EP3-Verilog-1.00 - 13 Mar 1998 20:00:12 UTC - Search in distribution

Verilog::VCD::Writer - VCD waveform File creation module. River stage zero No dependents

This module originated out of my need to view the <Time,Voltage> CSV dump from the scope using GTKWave. This module provides an interface for creating a VCD (Value change Dump) file. Please see examples/serial.pl for a complete example new (timescale...

JVS/Verilog-VCD-Writer-0.004 - 13 Dec 2017 03:21:45 UTC - Search in distribution

Mpp::Scanner::Verilog - makepp scanner for Verilog files River stage zero No dependents

Scans a verilog file for "`include"'s and instances. Tags are: vinc File scanned due to an `include directive or specified on the command line. vlog File scanned due to a requested instance. vlib File scanned due to a -v option....

PFEIFFER/makepp-2.0.99.2 - 09 Nov 2017 09:32:03 UTC - Search in distribution

Hardware::Verilog::Parser - A complete grammar for parsing Verilog code using perl River stage zero No dependents

This module defines the complete grammar needed to parse any Verilog code. By overloading this grammar, it is possible to easily create perl scripts which run through Verilog code and perform specific functions. For example, a Hierarchy.pm uses Hardw...

GSLONDON/Hardware-Verilog-Parser-0.13 - 27 Apr 2000 13:18:31 UTC - Search in distribution

Syntax::Highlight::Engine::Kate::Verilog - a Plugin for Verilog syntax highlighting River stage two • 11 direct dependents • 15 total dependents

Syntax::Highlight::Engine::Kate::Verilog is a plugin module that provides syntax highlighting for Verilog to the Syntax::Haghlight::Engine::Kate highlighting engine. This code is generated from the syntax definition files used by the Kate project. It...

MANWAR/Syntax-Highlight-Engine-Kate-0.14 - 13 Jan 2018 21:00:27 UTC - Search in distribution

VerilogGrammar - Parsing HUGE gate level verilog files a little bit at a time. River stage zero No dependents

This module is intended to be an example module that uses Parse::Nibbler. EXPORT None....

GSLONDON/Parse-Nibbler-1.10 - 22 Nov 2001 05:07:37 UTC - Search in distribution
  • VerilogGrammar - Parsing HUGE gate level verilog files a little bit at a time.

Perlilog - Verilog environment and IP core handling in Perl River stage zero No dependents

The project is extensively documented in Perlilog's user guide, which can be downloaded at <http://www.billauer.co.il/perlilog.html>. In wide terms, Perlilog is a Perl environment for Verilog code manipulation. It supplies the Perl programmer with se...

BILLAUER/Perlilog-1.0 - 01 May 2016 12:12:30 UTC - Search in distribution

Data::Table::Text - Write data in tabular text format. River stage two • 35 direct dependents • 35 total dependents

Write data in tabular text format. Version 20240203. The following sections describe the methods in each functional area of this module. For an alphabetic listing of all methods by name see Index....

PRBRENAN/Data-Table-Text-20240408 - 07 Apr 2024 19:30:28 UTC - Search in distribution

cpan2dist - The CPANPLUS distribution creator River stage two • 35 direct dependents • 40 total dependents

This script will create distributions of "CPAN" modules of the format you specify, including its prerequisites. These packages can then be installed using the corresponding package manager for the format. Note, you can also do this interactively from...

BINGOS/CPANPLUS-0.9914 - 23 Nov 2021 19:30:10 UTC - Search in distribution

Text::EP3 - The Extensible Perl PreProcessor River stage zero No dependents

EP3 is a Perl5 program that preprocesses STDIN or some set of input files and produces an output file. EP3 only works on input files and produces output files. It seems to me that if you want to preprocess arrays or somesuch, you should be using perl...

MYKL/Text-EP3-1.10 - 02 Mar 2006 13:26:47 UTC - Search in distribution

App::Greple::type - file type filter module for greple River stage zero No dependents

This module filters search target files by given rule. It is convenient to use with other greple module which support recursive or multi-file search such as "-Mfind", "-Mdig" or "-Mgit". For example, option for Perl is defined as this: option --type-...

UTASHIRO/App-Greple-type-1.0301 - 04 Oct 2023 19:00:51 UTC - Search in distribution

Syntax::Highlight::Universal - Syntax highlighting module based on the Colorer library River stage zero No dependents

Syntax::Highlight::Universal doesn't export any functions. You can call its methods either statically or through an object. The result will be the same but we will use the latter here as it is the more convenient of the two. Creating a new object my ...

PALANT/Syntax-Highlight-Universal-0.4 - 13 Mar 2005 18:32:47 UTC - Search in distribution

Dir::Project - Project Environment determination River stage zero No dependents

Dir::Project provides a way to locate a source-controlled directory (CVS, Subversion, Perforce, Git, etc) using only the current working directory (cd). This prevents users from having to set other environment variables when they switch between areas...

WSNYDER/Dir-Project-3.026 - 26 Apr 2017 15:44:06 UTC - Search in distribution

WWW::Pastebin::PastebinCom::API - implementation of pastebin.com API River stage one • 1 direct dependent • 1 total dependent

This module is an implementation of the pastebin.com API (<http://pastebin.com/api>). The API allows creation of public, unlisted, and private pastes; deletion of private pastes; listing of trending pastes and private pastes; and retrieval of a paste...

ZOFFIX/WWW-Pastebin-PastebinCom-API-1.001004 - 26 Dec 2016 18:31:10 UTC - Search in distribution

Syntax::Kamelon::Syntaxes - List of available syntaxes River stage one • 2 direct dependents • 2 total dependents

HANJE/Syntax-Kamelon-0.24 - 24 Sep 2023 16:22:48 UTC - Search in distribution

Hardware::Vhdl::Automake::Tutorial River stage zero No dependents

MYKL/Hardware-Vhdl-Automake-1.00 - 26 Nov 2009 16:01:25 UTC - Search in distribution
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