============================================================
Generated by: Encounter(R) RTL Compiler xxx
Generated on: xxx
Module: xxx
Library domain: xxx
Domain index: 0
Technology library: xx
Operating conditions: xx
Wireload mode: segmented
Area mode: timing library
============================================================
Library Leakage Dynamic Total
Instance Domain Cells Power(mW) Power(mW) Power(mW)
------------------------------------------------------------------------------------------------------------------------
vliw lib_tc 355320 22.729 1.667 24.395
inst_cga_vu1_mul lib_tc 43683 3.456 0.103 3.558
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I2 lib_tc 507 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I3 lib_tc 506 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I5 lib_tc 506 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I3 lib_tc 506 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I6 lib_tc 506 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I4 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I1 lib_tc 505 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I1 lib_tc 505 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I4 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I7 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I2 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I7 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I5 lib_tc 504 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I6 lib_tc 506 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I1 lib_tc 508 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I3 lib_tc 508 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I4 lib_tc 505 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I7 lib_tc 505 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I1 lib_tc 508 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I8 lib_tc 504 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I3 lib_tc 508 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I5 lib_tc 507 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I6 lib_tc 508 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I6 lib_tc 508 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I5 lib_tc 504 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I2 lib_tc 505 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I4 lib_tc 506 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I8 lib_tc 504 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I8 lib_tc 504 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I8 lib_tc 506 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I2 lib_tc 506 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I7 lib_tc 507 0.045 0.000 0.045
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I1 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I3 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I5 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I1 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I3 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I5 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I4 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I4 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I6 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I6 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I2 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I7 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I8 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I2 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I7 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I8 lib_tc 291 0.032 0.000 0.032
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I7 lib_tc 130 0.011 0.000 0.011
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I7_sra005066 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I2_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I8_sra005066 lib_tc 183 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I2_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I5_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I8_sra005066 lib_tc 183 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I2_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I5_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I8_sra005066 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I6_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I6_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I5_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I7_sra005066 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I3_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I7_sra005066 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I4_sra005066 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I6_sra005066 lib_tc 183 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I1_sra005066 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I4_sra005066 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I8_sra005066 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I1_sra005066 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I4_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I2_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I3_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I5_sra005066 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I3_sra005066 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I6_sra005066 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I1_sra005066 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I3_sra005066 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I7_sra005066 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I4_sra005066 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I1_sra005066 lib_tc 181 0.009 0.000 0.009
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I5_sra005066 lib_tc 150 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I6_sra005066 lib_tc 150 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I1_sra005066 lib_tc 150 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I4_sra005066 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I2_sra005066 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I5_sra005066 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I1_sra005066 lib_tc 149 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I4_sra005066 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I2_sra005066 lib_tc 151 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I7_sra005066 lib_tc 150 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I6_sra005066 lib_tc 150 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I3_sra005066 lib_tc 149 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I7_sra005066 lib_tc 149 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I3_sra005066 lib_tc 147 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I8_sra005066 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I8_sra005066 lib_tc 148 0.008 0.000 0.008
final_adder_mux_out_5_53_258 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_242 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_250 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_9 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_226 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_266 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_274 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_432 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_416 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_440 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_9 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_424 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_234 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_448 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_456 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_464 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_53_230 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_238 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_246 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_254 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_262 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_270 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_278 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_412 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_420 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_428 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_436 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_444 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_452 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_460 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_2_50_32 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_44 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_56 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_68 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_80 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_9 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_92 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_20 lib_tc 15 0.004 0.000 0.004
inst_cga_vu3_mul lib_tc 43714 3.422 0.103 3.524
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I7 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I2 lib_tc 506 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I4 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I2 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I1 lib_tc 504 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I5 lib_tc 504 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I5 lib_tc 506 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I3 lib_tc 506 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I6 lib_tc 506 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I7 lib_tc 506 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I7 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I1 lib_tc 507 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I3 lib_tc 506 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I6 lib_tc 506 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I8 lib_tc 504 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I4 lib_tc 505 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I3 lib_tc 508 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I5 lib_tc 507 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I6 lib_tc 507 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I6 lib_tc 508 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I7 lib_tc 508 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I8 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I3 lib_tc 508 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I4 lib_tc 505 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I2 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I4 lib_tc 504 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I2 lib_tc 505 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I8 lib_tc 505 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I1 lib_tc 507 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I1 lib_tc 504 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I5 lib_tc 504 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I8 lib_tc 506 0.045 0.000 0.045
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I6 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I6 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I1 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I2 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I3 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I5 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I7 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I8 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I1 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I2 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I3 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I5 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I7 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I8 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I4 lib_tc 291 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I4 lib_tc 291 0.032 0.000 0.032
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I7 lib_tc 130 0.011 0.000 0.011
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I7_sra0025729 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I2_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I2_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I8_sra0025729 lib_tc 183 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I2_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I1_sra0025729 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I1_sra0025729 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I8_sra0025729 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I5_sra0025729 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I7_sra0025729 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I3_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I4_sra0025729 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I4_sra0025729 lib_tc 183 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I5_sra0025729 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I8_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I8_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I5_sra0025729 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I3_sra0025729 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I7_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I6_sra0025729 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I4_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I6_sra0025729 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I2_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I3_sra0025729 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I5_sra0025729 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I1_sra0025729 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I7_sra0025729 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I3_sra0025729 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I6_sra0025729 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I4_sra0025729 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I1_sra0025729 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I6_sra0025729 lib_tc 178 0.009 0.000 0.009
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I5_sra0025729 lib_tc 150 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I4_sra0025729 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I1_sra0025729 lib_tc 150 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I7_sra0025729 lib_tc 151 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I2_sra0025729 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I5_sra0025729 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I2_sra0025729 lib_tc 152 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I4_sra0025729 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I6_sra0025729 lib_tc 149 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I1_sra0025729 lib_tc 149 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I6_sra0025729 lib_tc 150 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I3_sra0025729 lib_tc 149 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I7_sra0025729 lib_tc 149 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I8_sra0025729 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I8_sra0025729 lib_tc 148 0.008 0.000 0.008
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I3_sra0025729 lib_tc 147 0.008 0.000 0.008
final_adder_mux_out_5_53_258 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_242 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_250 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_9 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_226 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_266 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_274 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_432 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_416 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_440 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_9 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_424 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_234 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_448 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_456 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_464 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_53_230 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_238 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_246 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_254 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_262 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_270 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_278 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_412 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_420 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_428 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_436 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_444 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_452 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_460 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_2_50_32 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_44 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_56 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_68 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_80 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_9 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_92 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_20 lib_tc 15 0.004 0.000 0.004
inst_cga_vu2_mul lib_tc 42926 3.317 0.102 3.419
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I4 lib_tc 502 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I3 lib_tc 495 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I7 lib_tc 488 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I4 lib_tc 503 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I7 lib_tc 503 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I6 lib_tc 492 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I2 lib_tc 493 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I5 lib_tc 503 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I3 lib_tc 495 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I4 lib_tc 488 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I8 lib_tc 498 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I5 lib_tc 487 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I7 lib_tc 504 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I8 lib_tc 489 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I6 lib_tc 491 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I2 lib_tc 494 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I1 lib_tc 495 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I2 lib_tc 492 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I6 lib_tc 489 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I1 lib_tc 495 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I1 lib_tc 485 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I5 lib_tc 485 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I4 lib_tc 485 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I2 lib_tc 492 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I7 lib_tc 486 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I1 lib_tc 485 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I6 lib_tc 489 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I8 lib_tc 488 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1524_29_I3 lib_tc 485 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1464_31_I3 lib_tc 486 0.045 0.000 0.045
vword_cprod16_vword_vword_uint6_59_9_mul_1459_29_I5 lib_tc 500 0.045 0.000 0.045
vword_dprod16_vword_vword_uint6_62_9_mul_1529_29_I8 lib_tc 498 0.045 0.000 0.045
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I7 lib_tc 286 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I4 lib_tc 286 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I5 lib_tc 286 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I8 lib_tc 280 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I1 lib_tc 272 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I3 lib_tc 272 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I4 lib_tc 272 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I7 lib_tc 283 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I2 lib_tc 276 0.032 0.000 0.032
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I6 lib_tc 268 0.031 0.000 0.031
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I6 lib_tc 268 0.031 0.000 0.031
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I8 lib_tc 267 0.031 0.000 0.031
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I5 lib_tc 267 0.031 0.000 0.031
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I1 lib_tc 267 0.031 0.000 0.031
square_vword_abs_square_vword_uint6_50_9_mul_3030_32_I2 lib_tc 265 0.031 0.000 0.031
square_vword_abs_square_vword_uint6_50_9_mul_3040_32_I3 lib_tc 268 0.031 0.000 0.031
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I2 lib_tc 131 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I2 lib_tc 131 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I4 lib_tc 131 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I5 lib_tc 131 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I7 lib_tc 131 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I8 lib_tc 131 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I1 lib_tc 131 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I2 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1999_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1979_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I4 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I5 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I1 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I7 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I3 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I6 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1969_41_I8 lib_tc 130 0.011 0.000 0.011
vword_mul8_vword_vword_uint6_68_9_mul_1989_41_I6 lib_tc 130 0.011 0.000 0.011
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I3_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I5_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I6_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I4_sra0015336 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I5_sra0015336 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I8_sra0015336 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I3_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I2_sra0015336 lib_tc 182 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I2_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I5_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I4_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I1_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I7_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I1_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I8_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I1_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I6_sra0015336 lib_tc 181 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I4_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I4_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I6_sra0015336 lib_tc 178 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I5_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I8_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I1_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I7_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I3_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I8_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1640_14_I7_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I2_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1650_14_I6_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I7_sra0015336 lib_tc 180 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1686_15_I3_sra0015336 lib_tc 179 0.009 0.000 0.009
vword_ccmul16_vword_vword_uint6_53_9_SHIFT_RIGHT_1676_15_I2_sra0015336 lib_tc 178 0.009 0.000 0.009
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I1_sra0015336 lib_tc 153 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I3_sra0015336 lib_tc 154 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I2_sra0015336 lib_tc 153 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I8_sra0015336 lib_tc 154 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I2_sra0015336 lib_tc 153 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I7_sra0015336 lib_tc 153 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I3_sra0015336 lib_tc 155 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I8_sra0015336 lib_tc 153 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I4_sra0015336 lib_tc 152 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I5_sra0015336 lib_tc 152 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I6_sra0015336 lib_tc 154 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I4_sra0015336 lib_tc 153 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I5_sra0015336 lib_tc 153 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I1_sra0015336 lib_tc 153 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3030_14_I7_sra0015336 lib_tc 152 0.007 0.000 0.007
vword_abs_square_vword_uint6_50_9_SHIFT_RIGHT_3040_14_I6_sra0015336 lib_tc 152 0.007 0.000 0.007
final_adder_mux_out_5_53_258 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_242 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_250 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_266 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_464 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_9 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_9 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_440 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_274 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_424 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_416 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_448 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_226 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_5_53_234 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_432 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_56_456 lib_tc 19 0.004 0.000 0.004
final_adder_mux_out_4_53_230 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_238 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_246 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_254 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_262 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_270 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_278 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_4_53_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_412 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_420 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_428 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_436 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_444 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_452 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_460 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_5_56_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_2_50_32 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_44 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_56 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_68 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_80 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_9 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_92 lib_tc 15 0.004 0.000 0.004
final_adder_mux_out_2_50_20 lib_tc 15 0.004 0.000 0.004
inst_cga_vu3_recip lib_tc 32820 3.095 0.065 3.160
vword_recip_vword_111_9_mul_2216_70_I1_I1 lib_tc 467 0.052 0.000 0.052
vword_recip_vword_111_9_mul_2216_70_I4_I1 lib_tc 515 0.051 0.000 0.051
vword_recip_vword_111_9_mul_2216_70_I8_I1 lib_tc 501 0.051 0.000 0.051
vword_recip_vword_111_9_mul_2216_70_I6_I1 lib_tc 502 0.051 0.000 0.051
vword_recip_vword_111_9_mul_2216_70_I2_I1 lib_tc 491 0.051 0.000 0.051
vword_recip_vword_111_9_mul_2216_70_I3_I1 lib_tc 496 0.051 0.000 0.051
vword_recip_vword_111_9_mul_2216_70_I5_I1 lib_tc 506 0.051 0.000 0.051
vword_recip_vword_111_9_mul_2216_70_I7_I1 lib_tc 505 0.051 0.000 0.051
vword_recip_vword_111_9_mul_2216_109_I4_I1 lib_tc 458 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2437_70_I1_I1 lib_tc 448 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2437_70_I6_I1 lib_tc 448 0.046 0.000 0.046
vword_recip_vword_111_9_mul_2216_109_I6_I1 lib_tc 455 0.046 0.000 0.046
vword_recip_vword_111_9_mul_2216_109_I2_I1 lib_tc 453 0.046 0.000 0.046
vword_recip_vword_111_9_mul_2216_109_I8_I1 lib_tc 457 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2437_70_I7_I1 lib_tc 448 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2437_70_I2_I1 lib_tc 450 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2437_70_I3_I1 lib_tc 450 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2437_70_I8_I1 lib_tc 439 0.046 0.000 0.046
vword_recip_vword_111_9_mul_2216_109_I7_I1 lib_tc 460 0.046 0.000 0.046
vword_recip_vword_111_9_mul_2216_109_I1_I1 lib_tc 456 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2437_70_I4_I1 lib_tc 436 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2437_70_I5_I1 lib_tc 436 0.046 0.000 0.046
vword_recip_vword_111_9_mul_2216_109_I5_I1 lib_tc 459 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2435_61_I5_I1 lib_tc 463 0.046 0.000 0.046
vword_recip_vword_111_9_mul_2216_109_I3_I1 lib_tc 453 0.046 0.000 0.046
vword_recip_sqrt_vword_107_9_mul_2435_61_I1_I1 lib_tc 463 0.045 0.000 0.045
vword_recip_sqrt_vword_107_9_mul_2435_61_I6_I1 lib_tc 463 0.045 0.000 0.045
vword_recip_sqrt_vword_107_9_mul_2435_61_I8_I1 lib_tc 465 0.045 0.000 0.045
vword_recip_sqrt_vword_107_9_mul_2435_61_I4_I1 lib_tc 464 0.045 0.000 0.045
vword_recip_sqrt_vword_107_9_mul_2435_61_I7_I1 lib_tc 463 0.045 0.000 0.045
vword_recip_sqrt_vword_107_9_mul_2435_61_I3_I1 lib_tc 463 0.045 0.000 0.045
vword_recip_sqrt_vword_107_9_mul_2435_61_I2_I1 lib_tc 462 0.045 0.000 0.045
vword_recip_vword_111_9_mul_2213_66_I2 lib_tc 456 0.042 0.000 0.042
vword_recip_vword_111_9_mul_2213_66_I5 lib_tc 444 0.042 0.000 0.042
vword_recip_vword_111_9_mul_2213_66_I4 lib_tc 442 0.042 0.000 0.042
vword_recip_vword_111_9_mul_2213_66_I6 lib_tc 444 0.042 0.000 0.042
vword_recip_vword_111_9_mul_2213_66_I3 lib_tc 449 0.042 0.000 0.042
vword_recip_vword_111_9_mul_2213_66_I8 lib_tc 445 0.042 0.000 0.042
vword_recip_vword_111_9_mul_2213_66_I7 lib_tc 445 0.042 0.000 0.042
vword_recip_vword_111_9_mul_2213_66_I1 lib_tc 450 0.041 0.000 0.041
vword_recip_sqrt_vword_107_9_mul_2431_60_I7 lib_tc 398 0.041 0.000 0.041
vword_recip_sqrt_vword_107_9_mul_2431_60_I8 lib_tc 407 0.041 0.000 0.041
vword_recip_sqrt_vword_107_9_mul_2431_60_I6 lib_tc 402 0.040 0.000 0.040
vword_recip_sqrt_vword_107_9_mul_2431_60_I3 lib_tc 398 0.040 0.000 0.040
vword_recip_sqrt_vword_107_9_mul_2431_60_I2 lib_tc 401 0.040 0.000 0.040
vword_recip_sqrt_vword_107_9_mul_2431_60_I4 lib_tc 388 0.040 0.000 0.040
vword_recip_sqrt_vword_107_9_mul_2431_60_I5 lib_tc 404 0.040 0.000 0.040
vword_recip_sqrt_vword_107_9_mul_2431_60_I1 lib_tc 392 0.039 0.000 0.039
square_vword_recip_sqrt_vword_107_9_mul_2434_66_I1_I1 lib_tc 260 0.028 0.000 0.028
square_vword_recip_sqrt_vword_107_9_mul_2434_66_I8_I1 lib_tc 261 0.027 0.000 0.027
square_vword_recip_sqrt_vword_107_9_mul_2434_66_I2_I1 lib_tc 258 0.027 0.000 0.027
square_vword_recip_sqrt_vword_107_9_mul_2434_66_I5_I1 lib_tc 259 0.027 0.000 0.027
square_vword_recip_sqrt_vword_107_9_mul_2434_66_I7_I1 lib_tc 260 0.027 0.000 0.027
square_vword_recip_sqrt_vword_107_9_mul_2434_66_I6_I1 lib_tc 260 0.027 0.000 0.027
square_vword_recip_sqrt_vword_107_9_mul_2434_66_I4_I1 lib_tc 260 0.027 0.000 0.027
square_vword_recip_sqrt_vword_107_9_mul_2434_66_I3_I1 lib_tc 260 0.027 0.000 0.027
vword_recip_sqrt_vword_107_9_mul_2447_81_I1 lib_tc 194 0.024 0.000 0.024
vliw_RC_CG_HIER_INST52 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_mul_2447_81_I2 lib_tc 192 0.024 0.000 0.024
vliw_RC_CG_HIER_INST53 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_mul_2447_81_I3 lib_tc 192 0.024 0.000 0.024
vliw_RC_CG_HIER_INST54 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_mul_2447_81_I4 lib_tc 186 0.024 0.000 0.024
vliw_RC_CG_HIER_INST55 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_mul_2447_81_I8 lib_tc 195 0.024 0.000 0.024
vliw_RC_CG_HIER_INST59 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_mul_2447_81_I5 lib_tc 188 0.023 0.000 0.024
vliw_RC_CG_HIER_INST56 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_mul_2447_81_I6 lib_tc 192 0.023 0.000 0.024
vliw_RC_CG_HIER_INST57 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_mul_2447_81_I7 lib_tc 190 0.023 0.000 0.024
vliw_RC_CG_HIER_INST58 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_SHIFT_RIGHT_2447_57_I1_sra0031438 lib_tc 105 0.005 0.000 0.006
vliw_RC_CG_HIER_INST51 lib_tc 1 0.000 0.000 0.000
vword_recip_sqrt_vword_107_9_SHIFT_RIGHT_2447_57_I2_sra0031438 lib_tc 104 0.005 0.000 0.005
vword_recip_sqrt_vword_107_9_SHIFT_RIGHT_2447_57_I3_sra0031438 lib_tc 104 0.005 0.000 0.005
vword_recip_sqrt_vword_107_9_SHIFT_RIGHT_2447_57_I5_sra0031438 lib_tc 104 0.005 0.000 0.005
vword_recip_sqrt_vword_107_9_SHIFT_RIGHT_2447_57_I7_sra0031438 lib_tc 104 0.005 0.000 0.005
vword_recip_sqrt_vword_107_9_SHIFT_RIGHT_2447_57_I6_sra0031438 lib_tc 83 0.005 0.000 0.005
vword_recip_sqrt_vword_107_9_SHIFT_RIGHT_2447_57_I8_sra0031438 lib_tc 83 0.005 0.000 0.005
vword_recip_sqrt_vword_107_9_SHIFT_RIGHT_2447_57_I4_sra0031438 lib_tc 84 0.005 0.000 0.005
vword_recip_vword_111_9_sub_2214_43_I1 lib_tc 37 0.004 0.000 0.004
vword_recip_vword_111_9_sub_2214_43_I3 lib_tc 37 0.004 0.000 0.004
vword_recip_vword_111_9_sub_2214_43_I5 lib_tc 37 0.004 0.000 0.004
vword_recip_vword_111_9_sub_2214_43_I7 lib_tc 37 0.004 0.000 0.004
vword_recip_vword_111_9_sub_2214_43_I8 lib_tc 37 0.004 0.000 0.004
vword_recip_vword_111_9_sub_2214_43_I2 lib_tc 37 0.004 0.000 0.004
vword_recip_vword_111_9_sub_2214_43_I4 lib_tc 37 0.004 0.000 0.004
vword_recip_vword_111_9_sub_2214_43_I6 lib_tc 37 0.004 0.000 0.004
vword_recip_sqrt_vword_107_9_add_2432_43_I3 lib_tc 18 0.004 0.000 0.004
vword_recip_sqrt_vword_107_9_add_2432_43_I4 lib_tc 18 0.004 0.000 0.004
vword_recip_sqrt_vword_107_9_add_2432_43_I6 lib_tc 18 0.004 0.000 0.004
vword_recip_sqrt_vword_107_9_add_2432_43_I2 lib_tc 16 0.004 0.000 0.004
vword_recip_sqrt_vword_107_9_add_2432_43_I8 lib_tc 16 0.004 0.000 0.004
vword_recip_sqrt_vword_107_9_add_2432_43_I5 lib_tc 18 0.004 0.000 0.004
vword_recip_sqrt_vword_107_9_add_2432_43_I7 lib_tc 16 0.004 0.000 0.004
vword_recip_vword_111_9_SHIFT_LEFT_2193_16_I1_sll0031372 lib_tc 60 0.003 0.000 0.003
vliw_RC_CG_HIER_INST34 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST35 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST36 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST37 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST38 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST39 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST40 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST41 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST42 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST43 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST44 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST45 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST46 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST47 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST48 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST49 lib_tc 1 0.000 0.000 0.000
vliw_RC_CG_HIER_INST50 lib_tc 1 0.000 0.000 0.000
inst_reg_VDR1 lib_tc 66886 2.385 0.002 2.387
RC_CG_DECLONE_HIER_INST953447 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953427 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953428 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953429 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953430 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953432 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953434 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953435 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953437 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953438 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953439 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953440 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953442 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953444 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST953445 lib_tc 1 0.000 0.000 0.000
RC_CG_DECLONE_HIER_INST lib_tc 1 0.000 0.000 0.000
inst_cga_vu3_alu lib_tc 13556 1.068 0.196 1.264
const_vword_slope32_vword_vword_uint6_81_9_mul_2988_86_I7 lib_tc 33 0.005 0.000 0.005
vword_slope32_vword_vword_uint6_81_9_SHIFT_RIGHT_2988_57_I6_sra0022224 lib_tc 89 0.005 0.000 0.005
vword_slope32_vword_vword_uint6_81_9_SHIFT_RIGHT_2988_57_I7_sra0022224 lib_tc 90 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_SHIFT_RIGHT_2988_57_I5_sra0022224 lib_tc 90 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_SHIFT_RIGHT_2988_57_I3_sra0022224 lib_tc 86 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1054_26_I1 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1054_26_I2 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1054_26_I3 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1054_26_I4 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1054_26_I5 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1054_26_I6 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1054_26_I7 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1054_26_I8 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1059_26_I1 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1059_26_I2 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1059_26_I3 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1059_26_I4 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1059_26_I5 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1059_26_I6 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1059_26_I7 lib_tc 45 0.004 0.000 0.004
vword_sub16_wrap_vword_vword_87_9_sub_1059_26_I8 lib_tc 45 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_SHIFT_RIGHT_2988_57_I8_sra0022224 lib_tc 85 0.004 0.000 0.004
final_adder_mux_out_1_65_304 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_65_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_85_376 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_85_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_89_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_65_272 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_65_280 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_85_380 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_85_404 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_65_256 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_65_264 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_65_288 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_65_296 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_89_446 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_89_462 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_89_470 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_85_384 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_85_392 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_85_400 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_85_408 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_85_416 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_85_424 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_89_438 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_89_454 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_89_478 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_89_486 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_85_388 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_85_396 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_85_412 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_85_420 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_85_428 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_85_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_61_190 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_61_198 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_61_206 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_61_214 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_61_222 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_61_230 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_61_238 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_61_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_65_252 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_65_260 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_65_268 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_65_276 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_65_284 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_65_292 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_65_300 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_65_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_61_194 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_61_202 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_61_210 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_61_218 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_61_226 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_61_234 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_61_242 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_61_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_89_442 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_89_450 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_89_458 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_89_466 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_89_474 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_89_482 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_89_490 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_89_9 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1020_26_I1 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1020_26_I2 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1020_26_I3 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1020_26_I4 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1020_26_I5 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1020_26_I6 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1020_26_I7 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1020_26_I8 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1025_26_I1 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1025_26_I2 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1025_26_I3 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1025_26_I4 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1025_26_I5 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1025_26_I6 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1025_26_I7 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_63_9_add_1025_26_I8 lib_tc 16 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_add_2988_55_I1 lib_tc 16 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_add_2988_55_I2 lib_tc 16 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_add_2988_55_I3 lib_tc 16 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_add_2988_55_I4 lib_tc 16 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_add_2988_55_I5 lib_tc 16 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_add_2988_55_I6 lib_tc 16 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_add_2988_55_I7 lib_tc 16 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_add_2988_55_I8 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1339_32_I1 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1339_32_I2 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1339_32_I3 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1339_32_I4 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1339_32_I5 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1339_32_I6 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1339_32_I7 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1339_32_I8 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1360_32_I1 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1360_32_I2 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1360_32_I3 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1360_32_I4 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1360_32_I5 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1360_32_I6 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1360_32_I7 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_68_9_add_1360_32_I8 lib_tc 16 0.004 0.000 0.004
const_vword_slope32_vword_vword_uint6_81_9_mul_2988_86_I3 lib_tc 15 0.004 0.000 0.004
const_vword_slope32_vword_vword_uint6_81_9_mul_2988_86_I5 lib_tc 15 0.004 0.000 0.004
const_vword_slope32_vword_vword_uint6_81_9_mul_2988_86_I6 lib_tc 15 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_SHIFT_RIGHT_2988_57_I4_sra0022224 lib_tc 84 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_SHIFT_RIGHT_2988_57_I2_sra0022224 lib_tc 81 0.004 0.000 0.004
vword_slope32_vword_vword_uint6_81_9_SHIFT_RIGHT_2988_57_I1_sra0022224 lib_tc 78 0.003 0.000 0.003
inst_reg_CDR lib_tc 28607 1.047 0.014 1.061
inst_cga_vu2_alu lib_tc 12180 0.956 0.048 1.004
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I8 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I2 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I5 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I6 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I8 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I1 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I3 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I4 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I5 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I7 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I1 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I4 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I7 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I2 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I6 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I3 lib_tc 45 0.004 0.000 0.004
final_adder_mux_out_0_74_434 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_450 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_466 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_252 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_260 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_268 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_276 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_284 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_292 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_300 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_384 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_372 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_380 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_388 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_396 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_404 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_412 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_420 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_442 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_458 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_474 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_482 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_376 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_392 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_400 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_408 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_416 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_424 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_49_194 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_202 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_210 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_218 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_226 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_234 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_248 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_256 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_264 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_272 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_280 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_288 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_296 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_190 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_198 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_206 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_214 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_222 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_230 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_238 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_438 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_446 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_454 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_462 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_470 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_478 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_486 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_9 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I1 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I2 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I3 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I4 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I5 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I6 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I7 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I8 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I1 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I2 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I3 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I4 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I5 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I6 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I7 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I8 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_186 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I1 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I2 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I3 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I4 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I5 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I6 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I7 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I8 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I1 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I2 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I3 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I4 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I5 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I6 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I7 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I8 lib_tc 16 0.004 0.000 0.004
inst_cga_vu1_alu lib_tc 12293 0.952 0.049 1.001
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I8 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I2 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I4 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I5 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I6 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I8 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I1 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I3 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I4 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I5 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I7 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I1 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I7 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I2 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1059_26_I6 lib_tc 45 0.005 0.000 0.005
vword_sub16_wrap_vword_vword_72_9_sub_1054_26_I3 lib_tc 45 0.004 0.000 0.004
final_adder_mux_out_1_53_252 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_260 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_268 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_276 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_284 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_292 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_300 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_53_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_434 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_450 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_466 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_372 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_380 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_388 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_396 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_404 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_412 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_420 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_70_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_442 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_458 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_474 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_74_482 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_376 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_384 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_392 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_400 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_408 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_416 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_424 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_1_70_9 lib_tc 18 0.004 0.000 0.004
final_adder_mux_out_0_49_194 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_202 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_210 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_218 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_226 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_234 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_248 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_256 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_264 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_272 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_280 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_288 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_296 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_53_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_190 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_198 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_206 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_214 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_222 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_230 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_238 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_49_9 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_438 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_446 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_454 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_462 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_470 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_478 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_486 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_1_74_9 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I1 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I2 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I3 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I4 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I5 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I6 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I7 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1020_26_I8 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I1 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I2 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I3 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I4 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I5 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I6 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I7 lib_tc 16 0.004 0.000 0.004
vword_add16_wrap_vword_vword_51_9_add_1025_26_I8 lib_tc 16 0.004 0.000 0.004
final_adder_mux_out_0_49_186 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I1 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I2 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I3 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I4 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I5 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I6 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I7 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1339_32_I8 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I1 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I2 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I3 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I4 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I5 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I6 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I7 lib_tc 16 0.004 0.000 0.004
vword_cabs_vword_56_9_add_1360_32_I8 lib_tc 16 0.004 0.000 0.004
inst_cga_vu3_trig lib_tc 6277 0.535 0.289 0.824
vword_atan_vword_50_9_mul_2949_68_I1 lib_tc 234 0.024 0.000 0.024
vword_atan_vword_50_9_mul_2949_68_I8 lib_tc 234 0.024 0.000 0.024
vword_atan_vword_50_9_mul_2949_68_I2 lib_tc 212 0.024 0.000 0.024
vword_atan_vword_50_9_mul_2949_68_I3 lib_tc 212 0.024 0.000 0.024
vword_atan_vword_50_9_mul_2949_68_I4 lib_tc 212 0.024 0.000 0.024
vword_atan_vword_50_9_mul_2949_68_I5 lib_tc 212 0.024 0.000 0.024
vword_atan_vword_50_9_mul_2949_68_I6 lib_tc 225 0.023 0.000 0.023
vword_atan_vword_50_9_mul_2949_68_I7 lib_tc 225 0.023 0.000 0.023
vword_cexp_vword_53_9_mul_2631_67_I1 lib_tc 83 0.010 0.000 0.010
vword_cexp_vword_53_9_mul_2631_67_I7 lib_tc 83 0.010 0.000 0.010
vword_cexp_vword_53_9_mul_2631_67_I2 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2631_67_I3 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2631_67_I4 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2631_67_I5 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2631_67_I6 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2631_67_I8 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2727_71_I1 lib_tc 83 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2727_71_I8 lib_tc 83 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2727_71_I2 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2727_71_I3 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2727_71_I4 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2727_71_I5 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2727_71_I6 lib_tc 84 0.009 0.000 0.009
vword_cexp_vword_53_9_mul_2727_71_I7 lib_tc 84 0.009 0.000 0.009
inst_cga_vu2_logic lib_tc 6503 0.309 0.000 0.309
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I1_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I1_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I3_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I2_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I5_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I6_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I7_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I4_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I5_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I6_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I7_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I8_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I4_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I8_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I2_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I3_sll0021115 lib_tc 116 0.006 0.000 0.006
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I4_sra0021106 lib_tc 80 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I4_sra0021106 lib_tc 80 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I3_sra0021106 lib_tc 80 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I1_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I2_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I5_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I6_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I7_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I8_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I1_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I2_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I3_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I5_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I6_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I7_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I8_sra0021106 lib_tc 79 0.004 0.000 0.004
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I2_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I4_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I5_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I6_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I7_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I8_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I1_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I2_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I3_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I4_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I5_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I6_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I7_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I8_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I3_sll0021097 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I1_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I3_srl0020962 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I1_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I2_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I4_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I5_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I6_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I7_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I8_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I1_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I2_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I3_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I4_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I5_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I6_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I7_sll0021097 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I8_sll0021097 lib_tc 62 0.003 0.000 0.003
inst_cga_vu1_logic lib_tc 6505 0.304 0.000 0.304
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I2_sll0010845 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I6_sll0010845 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I7_sll0010845 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I2_sll0010845 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I3_sll0010845 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I5_sll0010845 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I4_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I1_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I5_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I8_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I1_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I4_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I6_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I7_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I8_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I3_sll0010845 lib_tc 116 0.006 0.000 0.006
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I7_sra0010836 lib_tc 80 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I4_sra0010836 lib_tc 80 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I3_sra0010836 lib_tc 80 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I1_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I2_sra0010836 lib_tc 78 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I4_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I5_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I6_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I8_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I1_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I2_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I3_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I5_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I6_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I7_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I8_sra0010836 lib_tc 79 0.004 0.000 0.004
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I2_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I4_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I5_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I6_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I7_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I8_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I1_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I2_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I3_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I4_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I5_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I6_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I7_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I8_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I3_sll0010827 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I1_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I3_srl0010692 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I1_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I2_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I4_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I5_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I6_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I7_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I1_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I2_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I3_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I4_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I5_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I6_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I7_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I8_sll0010827 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I8_sll0010827 lib_tc 62 0.003 0.000 0.003
inst_cga_vu3_logic lib_tc 6482 0.294 0.000 0.294
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I1_sll0036029 lib_tc 119 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I7_sll0036029 lib_tc 119 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I2_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I6_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I5_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I3_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I2_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I7_sll0036029 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I6_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I1_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I4_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I8_sll0036029 lib_tc 115 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I4_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3119_17_I5_sll0036029 lib_tc 116 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I3_sll0036029 lib_tc 117 0.006 0.000 0.006
vword_ssl16_vword_uint6_46_9_SHIFT_LEFT_3116_17_I8_sll0036029 lib_tc 116 0.006 0.000 0.006
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I7_sra0036020 lib_tc 76 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I8_sra0036020 lib_tc 76 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I4_sra0036020 lib_tc 78 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I7_sra0036020 lib_tc 82 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I1_sra0036020 lib_tc 79 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I3_sra0036020 lib_tc 82 0.004 0.000 0.004
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I8_sra0036020 lib_tc 77 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I3_sra0036020 lib_tc 82 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I5_sra0036020 lib_tc 79 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I1_sra0036020 lib_tc 77 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I6_sra0036020 lib_tc 76 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I6_sra0036020 lib_tc 77 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I2_sra0036020 lib_tc 77 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I2_sra0036020 lib_tc 76 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3163_15_I5_sra0036020 lib_tc 77 0.003 0.000 0.003
vword_shftr16_vword_uint6_44_9_SHIFT_RIGHT_3160_15_I4_sra0036020 lib_tc 76 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I6_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I7_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I2_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I5_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I1_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I4_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I3_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I8_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I8_sll0036011 lib_tc 63 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I6_sll0036011 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I1_sll0036011 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I3_sll0036011 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I2_sll0036011 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3186_15_I7_sll0036011 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I4_sll0036011 lib_tc 62 0.003 0.000 0.003
vword_shftl16_vword_uint6_42_9_SHIFT_LEFT_3189_15_I5_sll0036011 lib_tc 62 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I8_srl0035876 lib_tc 64 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I6_srl0035876 lib_tc 64 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I1_srl0035876 lib_tc 64 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I8_srl0035876 lib_tc 64 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I3_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I7_srl0035876 lib_tc 64 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I4_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I2_srl0035876 lib_tc 64 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I2_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I5_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I5_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I7_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I6_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I3_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3082_15_I1_srl0035876 lib_tc 63 0.003 0.000 0.003
vword_lsr16_vword_uint6_40_9_SHIFT_RIGHT_3085_15_I4_srl0035876 lib_tc 63 0.003 0.000 0.003
inst_decoder lib_tc 3709 0.192 0.455 0.648
vliw_RC_CG_HIER_INST0 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST1 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST10 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST11 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST12 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST13 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST14 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST15 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST16 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST17 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST18 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST19 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST2 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST20 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST21 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST22 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST23 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST24 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST25 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST26 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST27 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST28 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST29 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST3 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST30 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST31 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST32 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST33 lib_tc 1 0.000 0.000 0.001
vliw_RC_CG_HIER_INST4 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST5 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST6 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST7 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST8 lib_tc 1 0.000 0.001 0.001
vliw_RC_CG_HIER_INST9 lib_tc 1 0.000 0.001 0.001
inst_cga_pack1 lib_tc 4177 0.145 0.000 0.145
vword_vshift_vword_vword_word_50_9_sub_3309_43_I1 lib_tc 62 0.006 0.000 0.006
inst_cga_pack2 lib_tc 4101 0.143 0.000 0.143
vword_vshift_vword_vword_word_50_9_sub_3309_43_I1 lib_tc 62 0.006 0.000 0.006
inst_vliw_fu1_mul lib_tc 1095 0.096 0.000 0.096
word_mul_u_word_word_47_11_mul_476_34 lib_tc 528 0.046 0.000 0.046
word_mul_s_word_word_43_11_mul_488_43 lib_tc 510 0.046 0.000 0.046
inst_vliw_fu2_mul lib_tc 1095 0.096 0.000 0.096
word_mul_u_word_word_47_11_mul_476_34 lib_tc 528 0.046 0.000 0.046
word_mul_s_word_word_43_11_mul_488_43 lib_tc 510 0.046 0.000 0.046
inst_vliw_fu3_mul lib_tc 1079 0.096 0.000 0.096
word_mul_u_word_word_47_11_mul_476_34 lib_tc 517 0.047 0.000 0.047
word_mul_s_word_word_43_11_mul_488_43 lib_tc 504 0.045 0.000 0.045
inst_vliw_fu1_alu lib_tc 1053 0.056 0.026 0.082
word_sub_word_word_169_11_sub_409_18 lib_tc 93 0.009 0.000 0.009
word_add_word_word_142_11_add_401_18 lib_tc 32 0.008 0.000 0.008
word_scal_neg_word_164_9_minus_464_16 lib_tc 62 0.006 0.000 0.006
inc_word_incr_word_146_9_add_587_18_35 lib_tc 31 0.005 0.001 0.007
bool_gt_word_word_78_11_gt_597_12 lib_tc 61 0.001 0.000 0.001
bool_gt_u_word_word_74_11_gt_611_22 lib_tc 61 0.001 0.000 0.001
bool_le_word_word_86_11_lte_709_12 lib_tc 62 0.001 0.000 0.001
bool_ge_word_word_70_11_gte_625_12 lib_tc 61 0.001 0.000 0.001
bool_ge_u_word_word_66_11_gte_639_22 lib_tc 61 0.001 0.000 0.001
bool_le_u_word_word_82_11_lte_723_22 lib_tc 62 0.001 0.000 0.001
bool_lt_word_word_94_11_lt_681_12 lib_tc 62 0.001 0.000 0.001
bool_lt_u_word_word_90_11_lt_695_22 lib_tc 62 0.001 0.000 0.001
inst_vliw_fu2_alu lib_tc 955 0.047 0.000 0.047
word_sub_word_word_153_11_sub_409_18 lib_tc 93 0.009 0.000 0.009
word_add_word_word_129_11_add_401_18 lib_tc 32 0.008 0.000 0.008
word_scal_neg_word_148_9_minus_464_16 lib_tc 62 0.007 0.000 0.007
bool_gt_u_word_word_61_11_gt_611_22 lib_tc 61 0.002 0.000 0.002
bool_gt_word_word_65_11_gt_597_12 lib_tc 61 0.001 0.000 0.001
bool_le_u_word_word_69_11_lte_723_22 lib_tc 62 0.001 0.000 0.001
bool_le_word_word_73_11_lte_709_12 lib_tc 62 0.001 0.000 0.001
bool_ge_word_word_57_11_gte_625_12 lib_tc 61 0.001 0.000 0.001
bool_ge_u_word_word_53_11_gte_639_22 lib_tc 61 0.001 0.000 0.001
bool_lt_word_word_81_11_lt_681_12 lib_tc 62 0.001 0.000 0.001
bool_lt_u_word_word_77_11_lt_695_22 lib_tc 62 0.001 0.000 0.001
inst_vliw_fu3_alu lib_tc 952 0.047 0.000 0.047
word_sub_word_word_153_11_sub_409_18 lib_tc 93 0.009 0.000 0.009
word_add_word_word_129_11_add_401_18 lib_tc 32 0.008 0.000 0.008
word_scal_neg_word_148_9_minus_464_16 lib_tc 62 0.007 0.000 0.007
bool_gt_u_word_word_61_11_gt_611_22 lib_tc 61 0.002 0.000 0.002
bool_gt_word_word_65_11_gt_597_12 lib_tc 61 0.001 0.000 0.001
bool_le_u_word_word_69_11_lte_723_22 lib_tc 62 0.001 0.000 0.001
bool_le_word_word_73_11_lte_709_12 lib_tc 62 0.001 0.000 0.001
bool_ge_word_word_57_11_gte_625_12 lib_tc 61 0.001 0.000 0.001
bool_ge_u_word_word_53_11_gte_639_22 lib_tc 61 0.001 0.000 0.001
bool_lt_word_word_81_11_lt_681_12 lib_tc 62 0.001 0.000 0.001
bool_lt_u_word_word_77_11_lt_695_22 lib_tc 62 0.001 0.000 0.001
inst_vliw_fu1_logic lib_tc 867 0.046 0.000 0.046
word_asr_word_word_43_11_SHIFT_RIGHT_520_15_sra00316 lib_tc 217 0.011 0.000 0.011
word_lsl_word_word_67_11_SHIFT_LEFT_500_22_sll00345 lib_tc 167 0.009 0.000 0.009
word_lsr_word_word_71_11_SHIFT_RIGHT_512_22_srl00354 lib_tc 161 0.008 0.000 0.008
inst_vliw_fu3_logic lib_tc 871 0.045 0.000 0.045
word_asr_word_word_43_11_SHIFT_RIGHT_520_15_sra001108 lib_tc 217 0.010 0.000 0.010
word_lsr_word_word_71_11_SHIFT_RIGHT_512_22_srl001146 lib_tc 161 0.008 0.000 0.008
word_lsl_word_word_67_11_SHIFT_LEFT_500_22_sll001137 lib_tc 171 0.008 0.000 0.008
inst_vliw_fu2_logic lib_tc 870 0.044 0.000 0.044
word_asr_word_word_43_11_SHIFT_RIGHT_520_15_sra00718 lib_tc 218 0.010 0.000 0.010
word_lsr_word_word_71_11_SHIFT_RIGHT_512_22_srl00756 lib_tc 162 0.009 0.000 0.009
word_lsl_word_word_67_11_SHIFT_LEFT_500_22_sll00747 lib_tc 170 0.008 0.000 0.008
inst_controller lib_tc 695 0.041 0.006 0.047
add_137_24 lib_tc 34 0.009 0.001 0.010
add_162_28 lib_tc 32 0.005 0.003 0.008
sub_150_32 lib_tc 61 0.003 0.000 0.003
inst_mux_vdr1_cga_vu3_w lib_tc 1384 0.036 0.000 0.036
inst_reg_CPR lib_tc 865 0.033 0.019 0.052
inst_mux_vdr1_cga_vu2_w lib_tc 754 0.020 0.000 0.020
inst_pipe_cga_vu1_mul_vword_in1 lib_tc 259 0.020 0.000 0.020
inst_pipe_cga_vu1_mul_vword_in2 lib_tc 259 0.020 0.000 0.020
inst_pipe_cga_vu3_mul_vword_in1 lib_tc 259 0.020 0.000 0.020
inst_pipe_cga_vu3_mul_vword_in2 lib_tc 259 0.020 0.000 0.020
inst_pipe_cga_vu2_mul_vword_in1 lib_tc 259 0.020 0.000 0.020
inst_pipe_cga_vu2_mul_vword_in2 lib_tc 259 0.020 0.000 0.020
inst_mem_vVDM1 lib_tc 617 0.019 0.000 0.019
inst_mem_vVDM2 lib_tc 622 0.019 0.000 0.019
inst_mux_vdr1_cga_vu1_w lib_tc 761 0.018 0.000 0.018
inst_mem_LDM lib_tc 333 0.010 0.000 0.010
inst_cga_sl1 lib_tc 68 0.010 0.000 0.010
word_add_word_word_39_7_add_401_18 lib_tc 32 0.008 0.000 0.008
inst_cga_sl2 lib_tc 68 0.010 0.000 0.010
word_add_word_word_39_7_add_401_18 lib_tc 32 0.008 0.000 0.008
inst_loop_alu lib_tc 67 0.006 0.001 0.008
word_add_word_word_39_7_add_401_18 lib_tc 31 0.005 0.001 0.007
inst_mux_cdr_vliw_fu1_w lib_tc 118 0.004 0.000 0.004
inst_mux_cdr_vliw_fu3_w lib_tc 117 0.004 0.000 0.004
inst_mux_cdr_vliw_fu2_w lib_tc 116 0.004 0.000 0.004
inst_reg_gpo_reg lib_tc 71 0.004 0.000 0.004
inst_reg_LS lib_tc 71 0.004 0.000 0.004
inst_reg_LC lib_tc 72 0.003 0.000 0.004
inst_pipe_vliw_fu1_mul_word_out lib_tc 36 0.003 0.000 0.003
vliw_RC_CG_HIER_INST62 lib_tc 1 0.000 0.000 0.000
inst_pipe_vliw_fu2_mul_word_out lib_tc 36 0.003 0.000 0.003
vliw_RC_CG_HIER_INST65 lib_tc 1 0.000 0.000 0.000
inst_pipe_vliw_fu3_mul_word_out lib_tc 36 0.003 0.000 0.003
vliw_RC_CG_HIER_INST68 lib_tc 1 0.000 0.000 0.000
inst_mux_vliw_fu3_alu_word_in2 lib_tc 55 0.003 0.000 0.003
inst_mux_vliw_fu1_alu_word_in2 lib_tc 55 0.003 0.000 0.003
inst_mux_vliw_fu2_alu_word_in2 lib_tc 55 0.003 0.000 0.003
inst_reg_PC lib_tc 33 0.003 0.016 0.018
inst_reg_LE lib_tc 39 0.002 0.000 0.002
inst_mux_vliw_fu3_logic_word_in2 lib_tc 41 0.002 0.000 0.002
inst_mux_pc_trgt lib_tc 39 0.002 0.000 0.002
inst_mux_cga_sl1_alu_in2 lib_tc 39 0.002 0.000 0.002
inst_mux_cga_sl2_alu_in2 lib_tc 39 0.002 0.000 0.002
inst_mux_vliw_fu1_logic_word_in2 lib_tc 42 0.002 0.000 0.002
inst_mux_vliw_fu2_logic_word_in2 lib_tc 41 0.002 0.000 0.002
inst_mux_vliw_fu2_alu_word_in1 lib_tc 41 0.002 0.000 0.002
inst_mux_vliw_fu3_alu_word_in1 lib_tc 41 0.002 0.000 0.002
inst_mux_vliw_fu1_st_bus_word lib_tc 42 0.002 0.000 0.002
inst_mux_vliw_fu1_alu_word_in1 lib_tc 41 0.002 0.000 0.002
inst_mux_vliw_fu2_st_bus_word lib_tc 42 0.002 0.000 0.002
inst_mux_vliw_fu3_st_bus_word lib_tc 42 0.002 0.000 0.002
inst_mux_vliw_fu1_logic_word_in1 lib_tc 35 0.002 0.000 0.002
inst_mux_vliw_fu3_logic_word_in1 lib_tc 36 0.002 0.000 0.002
inst_mux_vliw_fu2_logic_word_in1 lib_tc 35 0.002 0.000 0.002
inst_mux_vliw_fu1_mem_addr lib_tc 36 0.002 0.000 0.002
inst_mux_vliw_fu2_mem_addr lib_tc 36 0.002 0.000 0.002
inst_mux_vliw_fu3_mem_addr lib_tc 36 0.002 0.000 0.002
inst_pipe_vliw_fu1_mul_word_in1 lib_tc 20 0.001 0.000 0.002
vliw_RC_CG_HIER_INST60 lib_tc 1 0.000 0.000 0.000
inst_pipe_vliw_fu1_mul_word_in2 lib_tc 20 0.001 0.000 0.002
vliw_RC_CG_HIER_INST61 lib_tc 1 0.000 0.000 0.000
inst_pipe_vliw_fu2_mul_word_in1 lib_tc 20 0.001 0.000 0.002
vliw_RC_CG_HIER_INST63 lib_tc 1 0.000 0.000 0.000
inst_pipe_vliw_fu2_mul_word_in2 lib_tc 20 0.001 0.000 0.002
vliw_RC_CG_HIER_INST64 lib_tc 1 0.000 0.000 0.000
inst_pipe_vliw_fu3_mul_word_in1 lib_tc 20 0.001 0.000 0.002
vliw_RC_CG_HIER_INST66 lib_tc 1 0.000 0.000 0.000
inst_pipe_vliw_fu3_mul_word_in2 lib_tc 20 0.001 0.000 0.002
vliw_RC_CG_HIER_INST67 lib_tc 1 0.000 0.000 0.000
inst_mux_vliw_fu1_mul_word_in2_w lib_tc 23 0.001 0.000 0.001
inst_mux_vliw_fu2_mul_word_in2_w lib_tc 23 0.001 0.000 0.001
inst_mux_lc_w lib_tc 41 0.001 0.000 0.001
inst_mux_vliw_fu3_mul_word_in2_w lib_tc 23 0.001 0.000 0.001
inst_mux_vliw_fu1_mul_word_in1_w lib_tc 18 0.001 0.000 0.001
inst_mux_vliw_fu2_mul_word_in1_w lib_tc 18 0.001 0.000 0.001
inst_mux_vliw_fu3_mul_word_in1_w lib_tc 18 0.001 0.000 0.001
inst_mux_cga_vu1_mul_uint6_in_w lib_tc 16 0.001 0.000 0.001
inst_mux_cga_vu2_mul_uint6_in_w lib_tc 16 0.001 0.000 0.001
inst_mux_cga_vu3_mul_uint6_in_w lib_tc 16 0.001 0.000 0.001
inst_pipe_cga_vu1_mul_uint6_in lib_tc 9 0.001 0.000 0.001
inst_pipe_cga_vu3_mul_uint6_in lib_tc 9 0.001 0.000 0.001
inst_pipe_cga_vu2_mul_uint6_in lib_tc 9 0.001 0.000 0.001
inst_mux_vliw_fu1_su_uint6_in lib_tc 8 0.000 0.000 0.000
inst_mux_vliw_fu2_su_uint6_in lib_tc 8 0.000 0.000 0.000
inst_mux_vliw_fu3_su_uint6_in lib_tc 8 0.000 0.000 0.000
inst_pipe_cpr_vliw_fu1_r1EX2 lib_tc 4 0.000 0.000 0.001
inst_pipe_cpr_vliw_fu2_r1EX2 lib_tc 4 0.000 0.000 0.001
inst_pipe_cpr_vliw_fu3_r1EX2 lib_tc 4 0.000 0.000 0.001
inst_reg_LF lib_tc 4 0.000 0.000 0.001
inst_pipe_cpr_vliw_fu1_r1EX3 lib_tc 4 0.000 0.000 0.000
inst_pipe_cpr_vliw_fu2_r1EX3 lib_tc 4 0.000 0.000 0.000
inst_pipe_cpr_vliw_fu3_r1EX3 lib_tc 4 0.000 0.000 0.000
inst_mux_cpr_vliw_fu3_w lib_tc 3 0.000 0.000 0.000
inst_vliw_fu1_su_unit lib_tc 7 0.000 0.000 0.000
inst_vliw_fu2_su_unit lib_tc 7 0.000 0.000 0.000
inst_vliw_fu3_su_unit lib_tc 7 0.000 0.000 0.000
inst_mux_cpr_vliw_fu1_w lib_tc 3 0.000 0.000 0.000
inst_mux_cpr_vliw_fu2_w lib_tc 3 0.000 0.000 0.000