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NAME ^

makepp_builtin -- Built in rules for makepp

DESCRIPTION ^

Makepp may be able to figure out how to compile and link your program even if you specify no rules at all (or if you don't even have a makefile). After every makefile is loaded, makepp also loads a set of default rules. (These rules are special in that they do not override any other rules in the makefile.) The default rule database is stored in the file makepp_builtin_rules.mk in the makepp distribution or library directory, so you can always look at that to see exactly what the default rules are.

Makepp's builtin rules are almost the same as the rules in GNU make, except that it has no rules for some of the rare languages that GNU make has rules for. (This is deliberate; I often ran into trouble with GNU make on several projects that accidently reused some of the suffixes that GNU make assigned to those rare languages.) The rules use the same variables as GNU make, with some possibly useful additions. Makepp is smarter than GNU make about inferring which compiler to use, and which other objects and libraries to link in.

Default variable values

Makepp supplies default values for a number of variables. These values will be overridden by assigning to these variables in your makefile.

$(CC)

The C compiler. Makepp looks for gcc, cc, or some other variants on your system and tries to pick an appropriate compiler.

$(CFLAGS)

-g unless you're using the GNU compiler, in which case it's -g -Wall.

$(CXX)

The C++ compiler. Makepp looks for g++, c++, cxx, or CC (and a few other variants) and tries to pick an appropriate value.

$(CXXFLAGS)

-g unless you're using the GNU compiler, in which case it's -g -Wall.

$(F77) or $(FC)

The Fortran compiler. Makepp looks for f77, g77, or fort77.

$(YACC)

yacc or bison -y, depending on what you have on your system.

$(LEX)

lex or flex, depending on what you have on your system.

If you have any questions about what any variable evaluates to, you can always put a line in your makefile like this:

    dummy := $(print $(CC))

which simply prints the value of the $(CC) variable when the makefile is loaded. (Incidently, this is a useful way to debug any expression that you're not sure is right.)

Compilation rules

In simplified form, here is approximately what the compilation rules look like. If you change the values of any of the indicated variables, the compilation command is changed as expected.

    #
    # For C programs:
    #
    %.o: %.c
        $(CC) $(CFLAGS) $(CPPFLAGS) -c $(input) -o $(output)
    
    #
    # For C++ programs:
    #
    %.o: %.cxx # and also %.cc, %.cpp, %.c++, and %.C
        $(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $(input) -o $(output)
    
    #
    # For fortran programs:
    #
    %.o: %.f
        $(FC) $(FFLAGS) -c $(input) -o $(output)
    
    #
    # Yacc and lex:
    #
    %.c: %.y
        $(YACC) $(YFLAGS) $(input)
        mv -f y.tab.c $(output)

    %.c: %.l
        $(LEX) $(LFLAGS) -t $(input) -o $(output)

If you're curious about the exact details, you can look in the file makepp_builtin_rules.mk in the makepp distribution.

Link rules

Makepp also knows how to link programs, too. Makepp attempts to be more clever than the standard Unix make when it comes to figuring out a link command. Suppose you are trying to build the target program xyz. Makepp will try to build this from xyz.o, and (unlike the standard unix make) it will also attempt to infer whether any other objects or libraries need to be linked in.

The link rule looks something like this:

    xyz: $(infer_objects xyz.o, *.o)
        $(inferred linker) $(inputs) $(LDFLAGS) $(LDLIBS) $(LIBS) -o $(output)

infer_objects attempts to infer what other .o files need to be linked in based on what .h files are included; see "infer_objects" in makepp_functions for details.

The "inferred linker" is a special bit of magic that turns into $(CC) if all the sources are C code, $(CXX) if any of the sources are C++, or $(F77) if any of the sources are Fortran.

Turning off the built-in rules

If you don't like the built-in rules, don't use them. If they don't work for you, your built is probably sufficiently complicated that you need your own custom makefile anyway.

To turn off the builtin rules, you can add a line like this to your makefile:

    makepp_no_builtin = 1

For backward compatibility, makepp also turns off its default rules if you include this line somewhere in your makefile:

    .SUFFIXES:
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