Verilog::Netlist::Interface - Interface within a Verilog Netlist
use Verilog::Netlist; ... my $interface = $netlist->find_interface('name'); my $cell = $self->find_cell('name') my $port = $self->find_port('name') my $net = $self->find_net('name')
A Verilog::Netlist::Interface object is created by Verilog::Netlist for every interface in the design.
See also Verilog::Netlist::Subclass for additional accessors and methods.
Returns any comments following the definition. keep_comments=>1 must be passed to Verilog::Netlist::new for comments to be retained.
Returns the port name associated with the given index.
Returns list of references to Verilog::Netlist::ModPort in the interface.
Returns list of references to Verilog::Netlist::ModPort in the interface sorted by name.
The name of the interface.
Reference to the Verilog::Netlist the interface is under.
Returns list of references to Verilog::Netlist::Net in the interface.
Returns list of name sorted references to Verilog::Netlist::Net in the interface.
Returns list of name sorted references to Verilog::Netlist::Net and Verilog::Netlist::Port in the interface.
Returns list of references to Verilog::Netlist::Port in the interface.
Returns list of references to Verilog::Netlist::Port in the interface sorted by pin number.
Returns list of references to Verilog::Netlist::Port in the interface sorted by name.
Returns Verilog::Netlist::Net matching given name.
Returns the reverse depth of this interface with respect to other modules and interfaces. See also Netlist's modules_sorted_level.
Checks the interface for errors.
Creates interconnections between this interface and other interfaces.
Creates a new Verilog::Netlist::Net.
Prints debugging information for this interface.
Returns verilog code which represents this interface. Returned as an array that must be joined together to form the final text string. The netlist must be already ->link'ed for this to work correctly.
Verilog-Perl is part of the http://www.veripool.org/ free Verilog EDA software tool suite. The latest version is available from CPAN and from http://www.veripool.org/verilog-perl.
Copyright 2000-2017 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
Wilson Snyder <wsnyder@wsnyder.org>
Verilog-Perl, Verilog::Netlist::Subclass Verilog::Netlist
To install Verilog::Std, copy and paste the appropriate command in to your terminal.
cpanm
cpanm Verilog::Std
CPAN shell
perl -MCPAN -e shell install Verilog::Std
For more information on module installation, please visit the detailed CPAN module installation guide.