Wilson Snyder > Verilog-Perl > Verilog::Netlist::ModPort

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Module Version: 3.408   Source  

NAME ^

Verilog::Netlist::ModPort - ModPort within a Verilog Interface

SYNOPSIS ^

  use Verilog::Netlist;

  ...
  my $interface = $netlist->find_interface('name');
  my $modport =  $interface->find_modport('name')

DESCRIPTION ^

A Verilog::Netlist::ModPort object is created by Verilog::Netlist::Interface for every modport under the interface.

METHODS ^

See also Verilog::Netlist::Subclass for additional accessors and methods.

$self->comment

Returns any comments following the definition. keep_comments=>1 must be passed to Verilog::Netlist::new for comments to be retained.

$self->dump

Prints debugging information for this modport.

$self->find_port(name)

Returns Verilog::Netlist::Net matching given name.

$self->find_port_by_index

Returns the port name associated with the given index.

$self->module

Returns Verilog::Netlist::Interface the ModPort belongs to.

$self->lint

Checks the modport for errors.

$self->name

The name of the modport.

$self->netlist

Reference to the Verilog::Netlist the modport is under.

$self->nets

Returns list of references to Verilog::Netlist::Net in the interface.

$self->nets_sorted

Returns list of name sorted references to Verilog::Netlist::Net in the interface.

$self->nets_and_ports_sorted

Returns list of name sorted references to Verilog::Netlist::Net and Verilog::Netlist::Port in the modport.

$self->ports

Returns list of references to Verilog::Netlist::Port in the modport.

$self->ports_ordered

Returns list of references to Verilog::Netlist::Port in the modport sorted by pin number.

$self->ports_sorted

Returns list of references to Verilog::Netlist::Port in the modport sorted by name.

$self->verilog_text

Returns verilog code which represents this modport. Returned as an array that must be joined together to form the final text string. The netlist must be already ->link'ed for this to work correctly.

DISTRIBUTION ^

Verilog-Perl is part of the http://www.veripool.org/ free Verilog EDA software tool suite. The latest version is available from CPAN and from http://www.veripool.org/verilog-perl.

Copyright 2000-2014 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.

AUTHORS ^

Wilson Snyder <wsnyder@wsnyder.org>

SEE ALSO ^

Verilog-Perl, Verilog::Netlist::Subclass Verilog::Netlist::Interface Verilog::Netlist

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